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path: root/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
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Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c')
-rw-r--r--drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c3
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
index d81cea661f5c..91ae0f8dbd88 100644
--- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
+++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c
@@ -99,7 +99,6 @@ struct dsi_pll_10nm {
/* protects REG_DSI_10nm_PHY_CMN_CLK_CFG0 register */
spinlock_t postdiv_lock;
- int vco_delay;
struct dsi_pll_config pll_configuration;
struct dsi_pll_regs reg_setup;
@@ -771,8 +770,6 @@ static int dsi_pll_10nm_init(struct msm_dsi_phy *phy)
pll = &pll_10nm->base;
pll->cfg = phy->cfg;
- pll_10nm->vco_delay = 1;
-
ret = pll_10nm_register(pll_10nm, phy->provided_clocks->hws);
if (ret) {
DRM_DEV_ERROR(&pdev->dev, "failed to register PLL: %d\n", ret);