diff options
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 24 |
1 files changed, 10 insertions, 14 deletions
diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c index 91c5bb2fd169..fb22c4b1b765 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c @@ -795,9 +795,9 @@ static const struct clk_ops clk_ops_dsi_pll_14nm_postdiv = { * PLL Callbacks */ -static void dsi_pll_14nm_save_state(struct msm_dsi_pll *pll) +static void dsi_14nm_pll_save_state(struct msm_dsi_phy *phy) { - struct dsi_pll_14nm *pll_14nm = to_pll_14nm(pll); + struct dsi_pll_14nm *pll_14nm = to_pll_14nm(phy->pll); struct pll_14nm_cached_state *cached_state = &pll_14nm->cached_state; void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; u32 data; @@ -810,18 +810,18 @@ static void dsi_pll_14nm_save_state(struct msm_dsi_pll *pll) DBG("DSI%d PLL save state %x %x", pll_14nm->id, cached_state->n1postdiv, cached_state->n2postdiv); - cached_state->vco_rate = clk_hw_get_rate(&pll->clk_hw); + cached_state->vco_rate = clk_hw_get_rate(&phy->pll->clk_hw); } -static int dsi_pll_14nm_restore_state(struct msm_dsi_pll *pll) +static int dsi_14nm_pll_restore_state(struct msm_dsi_phy *phy) { - struct dsi_pll_14nm *pll_14nm = to_pll_14nm(pll); + struct dsi_pll_14nm *pll_14nm = to_pll_14nm(phy->pll); struct pll_14nm_cached_state *cached_state = &pll_14nm->cached_state; void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; u32 data; int ret; - ret = dsi_pll_14nm_vco_set_rate(&pll->clk_hw, + ret = dsi_pll_14nm_vco_set_rate(&phy->pll->clk_hw, cached_state->vco_rate, 0); if (ret) { DRM_DEV_ERROR(&pll_14nm->pdev->dev, @@ -1166,10 +1166,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_cfgs = { .enable = dsi_14nm_phy_enable, .disable = dsi_14nm_phy_disable, .pll_init = dsi_pll_14nm_init, - }, - .pll_ops = { - .save_state = dsi_pll_14nm_save_state, - .restore_state = dsi_pll_14nm_restore_state, + .save_pll_state = dsi_14nm_pll_save_state, + .restore_pll_state = dsi_14nm_pll_restore_state, }, .min_pll_rate = VCO_MIN_RATE, .max_pll_rate = VCO_MAX_RATE, @@ -1190,10 +1188,8 @@ const struct msm_dsi_phy_cfg dsi_phy_14nm_660_cfgs = { .enable = dsi_14nm_phy_enable, .disable = dsi_14nm_phy_disable, .pll_init = dsi_pll_14nm_init, - }, - .pll_ops = { - .save_state = dsi_pll_14nm_save_state, - .restore_state = dsi_pll_14nm_restore_state, + .save_pll_state = dsi_14nm_pll_save_state, + .restore_pll_state = dsi_14nm_pll_restore_state, }, .min_pll_rate = VCO_MIN_RATE, .max_pll_rate = VCO_MAX_RATE, |