diff options
Diffstat (limited to 'drivers/scsi/cxlflash/main.c')
| -rw-r--r-- | drivers/scsi/cxlflash/main.c | 1162 |
1 files changed, 888 insertions, 274 deletions
diff --git a/drivers/scsi/cxlflash/main.c b/drivers/scsi/cxlflash/main.c index 3061d8045382..a7d57c343492 100644 --- a/drivers/scsi/cxlflash/main.c +++ b/drivers/scsi/cxlflash/main.c @@ -176,7 +176,6 @@ static void cmd_complete(struct afu_cmd *cmd) dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", __func__, scp, scp->result, cmd->sa.ioasc); - scsi_dma_unmap(scp); scp->scsi_done(scp); if (cmd_is_tmf) { @@ -224,8 +223,9 @@ static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg) static void context_reset_ioarrin(struct afu_cmd *cmd) { struct afu *afu = cmd->parent; + struct hwq *hwq = get_hwq(afu, cmd->hwq_index); - context_reset(cmd, &afu->host_map->ioarrin); + context_reset(cmd, &hwq->host_map->ioarrin); } /** @@ -235,8 +235,9 @@ static void context_reset_ioarrin(struct afu_cmd *cmd) static void context_reset_sq(struct afu_cmd *cmd) { struct afu *afu = cmd->parent; + struct hwq *hwq = get_hwq(afu, cmd->hwq_index); - context_reset(cmd, &afu->host_map->sq_ctx_reset); + context_reset(cmd, &hwq->host_map->sq_ctx_reset); } /** @@ -251,6 +252,7 @@ static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) { struct cxlflash_cfg *cfg = afu->parent; struct device *dev = &cfg->dev->dev; + struct hwq *hwq = get_hwq(afu, cmd->hwq_index); int rc = 0; s64 room; ulong lock_flags; @@ -259,23 +261,23 @@ static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) * To avoid the performance penalty of MMIO, spread the update of * 'room' over multiple commands. */ - spin_lock_irqsave(&afu->rrin_slock, lock_flags); - if (--afu->room < 0) { - room = readq_be(&afu->host_map->cmd_room); + spin_lock_irqsave(&hwq->rrin_slock, lock_flags); + if (--hwq->room < 0) { + room = readq_be(&hwq->host_map->cmd_room); if (room <= 0) { dev_dbg_ratelimited(dev, "%s: no cmd_room to send " "0x%02X, room=0x%016llX\n", __func__, cmd->rcb.cdb[0], room); - afu->room = 0; + hwq->room = 0; rc = SCSI_MLQUEUE_HOST_BUSY; goto out; } - afu->room = room - 1; + hwq->room = room - 1; } - writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin); + writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin); out: - spin_unlock_irqrestore(&afu->rrin_slock, lock_flags); + spin_unlock_irqrestore(&hwq->rrin_slock, lock_flags); dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__, cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); return rc; @@ -293,11 +295,12 @@ static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) { struct cxlflash_cfg *cfg = afu->parent; struct device *dev = &cfg->dev->dev; + struct hwq *hwq = get_hwq(afu, cmd->hwq_index); int rc = 0; int newval; ulong lock_flags; - newval = atomic_dec_if_positive(&afu->hsq_credits); + newval = atomic_dec_if_positive(&hwq->hsq_credits); if (newval <= 0) { rc = SCSI_MLQUEUE_HOST_BUSY; goto out; @@ -305,22 +308,22 @@ static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) cmd->rcb.ioasa = &cmd->sa; - spin_lock_irqsave(&afu->hsq_slock, lock_flags); + spin_lock_irqsave(&hwq->hsq_slock, lock_flags); - *afu->hsq_curr = cmd->rcb; - if (afu->hsq_curr < afu->hsq_end) - afu->hsq_curr++; + *hwq->hsq_curr = cmd->rcb; + if (hwq->hsq_curr < hwq->hsq_end) + hwq->hsq_curr++; else - afu->hsq_curr = afu->hsq_start; - writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail); + hwq->hsq_curr = hwq->hsq_start; + writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail); - spin_unlock_irqrestore(&afu->hsq_slock, lock_flags); + spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); out: dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, - cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr, - readq_be(&afu->host_map->sq_head), - readq_be(&afu->host_map->sq_tail)); + cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr, + readq_be(&hwq->host_map->sq_head), + readq_be(&hwq->host_map->sq_tail)); return rc; } @@ -355,6 +358,43 @@ static int wait_resp(struct afu *afu, struct afu_cmd *cmd) } /** + * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command + * @host: SCSI host associated with device. + * @scp: SCSI command to send. + * @afu: SCSI command to send. + * + * Hashes a command based upon the hardware queue mode. + * + * Return: Trusted index of target hardware queue + */ +static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp, + struct afu *afu) +{ + u32 tag; + u32 hwq = 0; + + if (afu->num_hwqs == 1) + return 0; + + switch (afu->hwq_mode) { + case HWQ_MODE_RR: + hwq = afu->hwq_rr_count++ % afu->num_hwqs; + break; + case HWQ_MODE_TAG: + tag = blk_mq_unique_tag(scp->request); + hwq = blk_mq_unique_tag_to_hwq(tag); + break; + case HWQ_MODE_CPU: + hwq = smp_processor_id() % afu->num_hwqs; + break; + default: + WARN_ON_ONCE(1); + } + + return hwq; +} + +/** * send_tmf() - sends a Task Management Function (TMF) * @afu: AFU to checkout from. * @scp: SCSI command from stack. @@ -365,10 +405,12 @@ static int wait_resp(struct afu *afu, struct afu_cmd *cmd) */ static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) { - u32 port_sel = scp->device->channel + 1; - struct cxlflash_cfg *cfg = shost_priv(scp->device->host); + struct Scsi_Host *host = scp->device->host; + struct cxlflash_cfg *cfg = shost_priv(host); struct afu_cmd *cmd = sc_to_afucz(scp); struct device *dev = &cfg->dev->dev; + int hwq_index = cmd_to_target_hwq(host, scp, afu); + struct hwq *hwq = get_hwq(afu, hwq_index); ulong lock_flags; int rc = 0; ulong to; @@ -385,10 +427,11 @@ static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd) cmd->scp = scp; cmd->parent = afu; cmd->cmd_tmf = true; + cmd->hwq_index = hwq_index; - cmd->rcb.ctx_id = afu->ctx_hndl; + cmd->rcb.ctx_id = hwq->ctx_hndl; cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; - cmd->rcb.port_sel = port_sel; + cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | SISL_REQ_FLAGS_SUP_UNDERRUN | @@ -444,10 +487,10 @@ static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) struct device *dev = &cfg->dev->dev; struct afu_cmd *cmd = sc_to_afucz(scp); struct scatterlist *sg = scsi_sglist(scp); - u32 port_sel = scp->device->channel + 1; + int hwq_index = cmd_to_target_hwq(host, scp, afu); + struct hwq *hwq = get_hwq(afu, hwq_index); u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; ulong lock_flags; - int nseg = 0; int rc = 0; dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " @@ -472,6 +515,8 @@ static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); switch (cfg->state) { + case STATE_PROBING: + case STATE_PROBED: case STATE_RESET: dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); rc = SCSI_MLQUEUE_HOST_BUSY; @@ -487,23 +532,17 @@ static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) } if (likely(sg)) { - nseg = scsi_dma_map(scp); - if (unlikely(nseg < 0)) { - dev_err(dev, "%s: Fail DMA map\n", __func__); - rc = SCSI_MLQUEUE_HOST_BUSY; - goto out; - } - - cmd->rcb.data_len = sg_dma_len(sg); - cmd->rcb.data_ea = sg_dma_address(sg); + cmd->rcb.data_len = sg->length; + cmd->rcb.data_ea = (uintptr_t)sg_virt(sg); } cmd->scp = scp; cmd->parent = afu; + cmd->hwq_index = hwq_index; - cmd->rcb.ctx_id = afu->ctx_hndl; + cmd->rcb.ctx_id = hwq->ctx_hndl; cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; - cmd->rcb.port_sel = port_sel; + cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); if (scp->sc_data_direction == DMA_TO_DEVICE) @@ -513,8 +552,6 @@ static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); rc = afu->send_cmd(afu, cmd); - if (unlikely(rc)) - scsi_dma_unmap(scp); out: return rc; } @@ -554,17 +591,28 @@ static void free_mem(struct cxlflash_cfg *cfg) * Safe to call with AFU in a partially allocated/initialized state. * * Cancels scheduled worker threads, waits for any active internal AFU - * commands to timeout and then unmaps the MMIO space. + * commands to timeout, disables IRQ polling and then unmaps the MMIO space. */ static void stop_afu(struct cxlflash_cfg *cfg) { struct afu *afu = cfg->afu; + struct hwq *hwq; + int i; cancel_work_sync(&cfg->work_q); if (likely(afu)) { while (atomic_read(&afu->cmds_active)) ssleep(1); + + if (afu_is_irqpoll_enabled(afu)) { + for (i = 0; i < afu->num_hwqs; i++) { + hwq = get_hwq(afu, i); + + irq_poll_disable(&hwq->irqpoll); + } + } + if (likely(afu->afu_map)) { cxl_psa_unmap((void __iomem *)afu->afu_map); afu->afu_map = NULL; @@ -576,28 +624,40 @@ static void stop_afu(struct cxlflash_cfg *cfg) * term_intr() - disables all AFU interrupts * @cfg: Internal structure associated with the host. * @level: Depth of allocation, where to begin waterfall tear down. + * @index: Index of the hardware queue. * * Safe to call with AFU/MC in partially allocated/initialized state. */ -static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level) +static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level, + u32 index) { struct afu *afu = cfg->afu; struct device *dev = &cfg->dev->dev; + struct hwq *hwq; - if (!afu || !cfg->mcctx) { - dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); + if (!afu) { + dev_err(dev, "%s: returning with NULL afu\n", __func__); + return; + } + + hwq = get_hwq(afu, index); + + if (!hwq->ctx) { + dev_err(dev, "%s: returning with NULL MC\n", __func__); return; } switch (level) { case UNMAP_THREE: - cxl_unmap_afu_irq(cfg->mcctx, 3, afu); + /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ + if (index == PRIMARY_HWQ) + cxl_unmap_afu_irq(hwq->ctx, 3, hwq); case UNMAP_TWO: - cxl_unmap_afu_irq(cfg->mcctx, 2, afu); + cxl_unmap_afu_irq(hwq->ctx, 2, hwq); case UNMAP_ONE: - cxl_unmap_afu_irq(cfg->mcctx, 1, afu); + cxl_unmap_afu_irq(hwq->ctx, 1, hwq); case FREE_IRQ: - cxl_free_afu_irqs(cfg->mcctx); + cxl_free_afu_irqs(hwq->ctx); /* fall through */ case UNDO_NOOP: /* No action required */ @@ -608,24 +668,32 @@ static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level) /** * term_mc() - terminates the master context * @cfg: Internal structure associated with the host. - * @level: Depth of allocation, where to begin waterfall tear down. + * @index: Index of the hardware queue. * * Safe to call with AFU/MC in partially allocated/initialized state. */ -static void term_mc(struct cxlflash_cfg *cfg) +static void term_mc(struct cxlflash_cfg *cfg, u32 index) { - int rc = 0; struct afu *afu = cfg->afu; struct device *dev = &cfg->dev->dev; + struct hwq *hwq; - if (!afu || !cfg->mcctx) { - dev_err(dev, "%s: returning with NULL afu or MC\n", __func__); + if (!afu) { + dev_err(dev, "%s: returning with NULL afu\n", __func__); return; } - rc = cxl_stop_context(cfg->mcctx); - WARN_ON(rc); - cfg->mcctx = NULL; + hwq = get_hwq(afu, index); + + if (!hwq->ctx) { + dev_err(dev, "%s: returning with NULL MC\n", __func__); + return; + } + + WARN_ON(cxl_stop_context(hwq->ctx)); + if (index != PRIMARY_HWQ) + WARN_ON(cxl_release_context(hwq->ctx)); + hwq->ctx = NULL; } /** @@ -637,21 +705,25 @@ static void term_mc(struct cxlflash_cfg *cfg) static void term_afu(struct cxlflash_cfg *cfg) { struct device *dev = &cfg->dev->dev; + int k; /* * Tear down is carefully orchestrated to ensure * no interrupts can come in when the problem state * area is unmapped. * - * 1) Disable all AFU interrupts + * 1) Disable all AFU interrupts for each master * 2) Unmap the problem state area - * 3) Stop the master context + * 3) Stop each master context */ - term_intr(cfg, UNMAP_THREE); + for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) + term_intr(cfg, UNMAP_THREE, k); + if (cfg->afu) stop_afu(cfg); - term_mc(cfg); + for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) + term_mc(cfg, k); dev_dbg(dev, "%s: returning\n", __func__); } @@ -670,8 +742,8 @@ static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) { struct afu *afu = cfg->afu; struct device *dev = &cfg->dev->dev; - struct sisl_global_map __iomem *global; struct dev_dependent_vals *ddv; + __be64 __iomem *fc_port_regs; u64 reg, status; int i, retry_cnt = 0; @@ -684,23 +756,25 @@ static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) return; } - global = &afu->afu_map->global; - /* Notify AFU */ - for (i = 0; i < NUM_FC_PORTS; i++) { - reg = readq_be(&global->fc_regs[i][FC_CONFIG2 / 8]); + for (i = 0; i < cfg->num_fc_ports; i++) { + fc_port_regs = get_fc_port_regs(cfg, i); + + reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); reg |= SISL_FC_SHUTDOWN_NORMAL; - writeq_be(reg, &global->fc_regs[i][FC_CONFIG2 / 8]); + writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); } if (!wait) return; /* Wait up to 1.5 seconds for shutdown processing to complete */ - for (i = 0; i < NUM_FC_PORTS; i++) { + for (i = 0; i < cfg->num_fc_ports; i++) { + fc_port_regs = get_fc_port_regs(cfg, i); retry_cnt = 0; + while (true) { - status = readq_be(&global->fc_regs[i][FC_STATUS / 8]); + status = readq_be(&fc_port_regs[FC_STATUS / 8]); if (status & SISL_STATUS_SHUTDOWN_COMPLETE) break; if (++retry_cnt >= MC_RETRY_CNT) { @@ -717,7 +791,8 @@ static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) * cxlflash_remove() - PCI entry point to tear down host * @pdev: PCI device associated with the host. * - * Safe to use as a cleanup in partially allocated/initialized state. + * Safe to use as a cleanup in partially allocated/initialized state. Note that + * the reset_waitq is flushed as part of the stop/termination of user contexts. */ static void cxlflash_remove(struct pci_dev *pdev) { @@ -750,7 +825,6 @@ static void cxlflash_remove(struct pci_dev *pdev) case INIT_STATE_SCSI: cxlflash_term_local_luns(cfg); scsi_remove_host(cfg->host); - /* fall through */ case INIT_STATE_AFU: term_afu(cfg); case INIT_STATE_PCI: @@ -789,6 +863,7 @@ static int alloc_mem(struct cxlflash_cfg *cfg) goto out; } cfg->afu->parent = cfg; + cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS; cfg->afu->afu_map = NULL; out: return rc; @@ -1024,53 +1099,16 @@ static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); } -/* - * Asynchronous interrupt information table - */ -static const struct asyc_intr_info ainfo[] = { - {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET}, - {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0}, - {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET}, - {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, LINK_RESET}, - {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR}, - {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, SCAN_HOST}, - {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0}, - {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0}, - {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET}, - {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0}, - {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET}, - {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, LINK_RESET}, - {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR}, - {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, SCAN_HOST}, - {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0}, - {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0}, - {0x0, "", 0, 0} /* terminator */ -}; - -/** - * find_ainfo() - locates and returns asynchronous interrupt information - * @status: Status code set by AFU on error. - * - * Return: The located information or NULL when the status code is invalid. - */ -static const struct asyc_intr_info *find_ainfo(u64 status) -{ - const struct asyc_intr_info *info; - - for (info = &ainfo[0]; info->status; info++) - if (info->status == status) - return info; - - return NULL; -} - /** * afu_err_intr_init() - clears and initializes the AFU for error interrupts * @afu: AFU associated with the host. */ static void afu_err_intr_init(struct afu *afu) { + struct cxlflash_cfg *cfg = afu->parent; + __be64 __iomem *fc_port_regs; int i; + struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); u64 reg; /* global async interrupts: AFU clears afu_ctrl on context exit @@ -1082,8 +1120,8 @@ static void afu_err_intr_init(struct afu *afu) /* mask all */ writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); - /* set LISN# to send and point to master context */ - reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); + /* set LISN# to send and point to primary master context */ + reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); if (afu->internal_lun) reg |= 1; /* Bit 63 indicates local lun */ @@ -1098,17 +1136,19 @@ static void afu_err_intr_init(struct afu *afu) writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); /* Clear/Set internal lun bits */ - reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]); + fc_port_regs = get_fc_port_regs(cfg, 0); + reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); reg &= SISL_FC_INTERNAL_MASK; if (afu->internal_lun) reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); - writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]); + writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); /* now clear FC errors */ - for (i = 0; i < NUM_FC_PORTS; i++) { - writeq_be(0xFFFFFFFFU, - &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]); - writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]); + for (i = 0; i < cfg->num_fc_ports; i++) { + fc_port_regs = get_fc_port_regs(cfg, i); + + writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); + writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); } /* sync interrupts for master's IOARRIN write */ @@ -1117,8 +1157,12 @@ static void afu_err_intr_init(struct afu *afu) /* IOARRIN yet), so there is nothing to clear. */ /* set LISN#, it is always sent to the context that wrote IOARRIN */ - writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl); - writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask); + for (i = 0; i < afu->num_hwqs; i++) { + hwq = get_hwq(afu, i); + + writeq_be(SISL_MSI_SYNC_ERROR, &hwq->host_map->ctx_ctrl); + writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask); + } } /** @@ -1130,13 +1174,13 @@ static void afu_err_intr_init(struct afu *afu) */ static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) { - struct afu *afu = (struct afu *)data; - struct cxlflash_cfg *cfg = afu->parent; + struct hwq *hwq = (struct hwq *)data; + struct cxlflash_cfg *cfg = hwq->afu->parent; struct device *dev = &cfg->dev->dev; u64 reg; u64 reg_unmasked; - reg = readq_be(&afu->host_map->intr_status); + reg = readq_be(&hwq->host_map->intr_status); reg_unmasked = (reg & SISL_ISTATUS_UNMASK); if (reg_unmasked == 0UL) { @@ -1148,32 +1192,36 @@ static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", __func__, reg); - writeq_be(reg_unmasked, &afu->host_map->intr_clear); + writeq_be(reg_unmasked, &hwq->host_map->intr_clear); cxlflash_sync_err_irq_exit: return IRQ_HANDLED; } /** - * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) - * @irq: Interrupt number. - * @data: Private data provided at interrupt registration, the AFU. + * process_hrrq() - process the read-response queue + * @afu: AFU associated with the host. + * @doneq: Queue of commands harvested from the RRQ. + * @budget: Threshold of RRQ entries to process. * - * Return: Always return IRQ_HANDLED. + * This routine must be called holding the disabled RRQ spin lock. + * + * Return: The number of entries processed. */ -static irqreturn_t cxlflash_rrq_irq(int irq, void *data) +static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget) { - struct afu *afu = (struct afu *)data; + struct afu *afu = hwq->afu; struct afu_cmd *cmd; struct sisl_ioasa *ioasa; struct sisl_ioarcb *ioarcb; - bool toggle = afu->toggle; + bool toggle = hwq->toggle; + int num_hrrq = 0; u64 entry, - *hrrq_start = afu->hrrq_start, - *hrrq_end = afu->hrrq_end, - *hrrq_curr = afu->hrrq_curr; + *hrrq_start = hwq->hrrq_start, + *hrrq_end = hwq->hrrq_end, + *hrrq_curr = hwq->hrrq_curr; - /* Process however many RRQ entries that are ready */ + /* Process ready RRQ entries up to the specified budget (if any) */ while (true) { entry = *hrrq_curr; @@ -1190,7 +1238,7 @@ static irqreturn_t cxlflash_rrq_irq(int irq, void *data) cmd = container_of(ioarcb, struct afu_cmd, rcb); } - cmd_complete(cmd); + list_add_tail(&cmd->queue, doneq); /* Advance to next entry or wrap and flip the toggle bit */ if (hrrq_curr < hrrq_end) @@ -1200,15 +1248,123 @@ static irqreturn_t cxlflash_rrq_irq(int irq, void *data) toggle ^= SISL_RESP_HANDLE_T_BIT; } - atomic_inc(&afu->hsq_credits); + atomic_inc(&hwq->hsq_credits); + num_hrrq++; + + if (budget > 0 && num_hrrq >= budget) + break; + } + + hwq->hrrq_curr = hrrq_curr; + hwq->toggle = toggle; + + return num_hrrq; +} + +/** + * process_cmd_doneq() - process a queue of harvested RRQ commands + * @doneq: Queue of completed commands. + * + * Note that upon return the queue can no longer be trusted. + */ +static void process_cmd_doneq(struct list_head *doneq) +{ + struct afu_cmd *cmd, *tmp; + + WARN_ON(list_empty(doneq)); + + list_for_each_entry_safe(cmd, tmp, doneq, queue) + cmd_complete(cmd); +} + +/** + * cxlflash_irqpoll() - process a queue of harvested RRQ commands + * @irqpoll: IRQ poll structure associated with queue to poll. + * @budget: Threshold of RRQ entries to process per poll. + * + * Return: The number of entries processed. + */ +static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) +{ + struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll); + unsigned long hrrq_flags; + LIST_HEAD(doneq); + int num_entries = 0; + + spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); + + num_entries = process_hrrq(hwq, &doneq, budget); + if (num_entries < budget) + irq_poll_complete(irqpoll); + + spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); + + process_cmd_doneq(&doneq); + return num_entries; +} + +/** + * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) + * @irq: Interrupt number. + * @data: Private data provided at interrupt registration, the AFU. + * + * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. + */ +static irqreturn_t cxlflash_rrq_irq(int irq, void *data) +{ + struct hwq *hwq = (struct hwq *)data; + struct afu *afu = hwq->afu; + unsigned long hrrq_flags; + LIST_HEAD(doneq); + int num_entries = 0; + + spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); + + if (afu_is_irqpoll_enabled(afu)) { + irq_poll_sched(&hwq->irqpoll); + spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); + return IRQ_HANDLED; } - afu->hrrq_curr = hrrq_curr; - afu->toggle = toggle; + num_entries = process_hrrq(hwq, &doneq, -1); + spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); + + if (num_entries == 0) + return IRQ_NONE; + process_cmd_doneq(&doneq); return IRQ_HANDLED; } +/* + * Asynchronous interrupt information table + * + * NOTE: + * - Order matters here as this array is indexed by bit position. + * + * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro + * as complex and complains due to a lack of parentheses/braces. + */ +#define ASTATUS_FC(_a, _b, _c, _d) \ + { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } + +#define BUILD_SISL_ASTATUS_FC_PORT(_a) \ + ASTATUS_FC(_a, LINK_UP, "link up", 0), \ + ASTATUS_FC(_a, LINK_DN, "link down", 0), \ + ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ + ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ + ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ + ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ + ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ + ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET) + +static const struct asyc_intr_info ainfo[] = { + BUILD_SISL_ASTATUS_FC_PORT(1), + BUILD_SISL_ASTATUS_FC_PORT(0), + BUILD_SISL_ASTATUS_FC_PORT(3), + BUILD_SISL_ASTATUS_FC_PORT(2) +}; + /** * cxlflash_async_err_irq() - interrupt handler for asynchronous errors * @irq: Interrupt number. @@ -1218,20 +1374,22 @@ static irqreturn_t cxlflash_rrq_irq(int irq, void *data) */ static irqreturn_t cxlflash_async_err_irq(int irq, void *data) { - struct afu *afu = (struct afu *)data; + struct hwq *hwq = (struct hwq *)data; + struct afu *afu = hwq->afu; struct cxlflash_cfg *cfg = afu->parent; struct device *dev = &cfg->dev->dev; - u64 reg_unmasked; const struct asyc_intr_info *info; struct sisl_global_map __iomem *global = &afu->afu_map->global; + __be64 __iomem *fc_port_regs; + u64 reg_unmasked; u64 reg; + u64 bit; u8 port; - int i; reg = readq_be(&global->regs.aintr_status); reg_unmasked = (reg & SISL_ASTATUS_UNMASK); - if (reg_unmasked == 0) { + if (unlikely(reg_unmasked == 0)) { dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", __func__, reg); goto out; @@ -1241,16 +1399,24 @@ static irqreturn_t cxlflash_async_err_irq(int irq, void *data) writeq_be(reg_unmasked, &global->regs.aintr_clear); /* Check each bit that is on */ - for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) { - info = find_ainfo(1ULL << i); - if (((reg_unmasked & 0x1) == 0) || !info) + for_each_set_bit(bit, (ulong *)®_unmasked, BITS_PER_LONG) { + if (unlikely(bit >= ARRAY_SIZE(ainfo))) { + WARN_ON_ONCE(1); continue; + } + + info = &ainfo[bit]; + if (unlikely(info->status != 1ULL << bit)) { + WARN_ON_ONCE(1); + continue; + } port = info->port; + fc_port_regs = get_fc_port_regs(cfg, port); dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", __func__, port, info->desc, - readq_be(&global->fc_regs[port][FC_STATUS / 8])); + readq_be(&fc_port_regs[FC_STATUS / 8])); /* * Do link reset first, some OTHER errors will set FC_ERROR @@ -1265,7 +1431,7 @@ static irqreturn_t cxlflash_async_err_irq(int irq, void *data) } if (info->action & CLR_FC_ERROR) { - reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]); + reg = readq_be(&fc_port_regs[FC_ERROR / 8]); /* * Since all errors are unmasked, FC_ERROR and FC_ERRCAP @@ -1275,8 +1441,8 @@ static irqreturn_t cxlflash_async_err_irq(int irq, void *data) dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", __func__, port, reg); - writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]); - writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]); + writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); + writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); } if (info->action & SCAN_HOST) { @@ -1292,16 +1458,18 @@ out: /** * start_context() - starts the master context * @cfg: Internal structure associated with the host. + * @index: Index of the hardware queue. * * Return: A success or failure value from CXL services. */ -static int start_context(struct cxlflash_cfg *cfg) +static int start_context(struct cxlflash_cfg *cfg, u32 index) { struct device *dev = &cfg->dev->dev; + struct hwq *hwq = get_hwq(cfg->afu, index); int rc = 0; - rc = cxl_start_context(cfg->mcctx, - cfg->afu->work.work_element_descriptor, + rc = cxl_start_context(hwq->ctx, + hwq->work.work_element_descriptor, NULL); dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); @@ -1311,7 +1479,7 @@ static int start_context(struct cxlflash_cfg *cfg) /** * read_vpd() - obtains the WWPNs from VPD * @cfg: Internal structure associated with the host. - * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs + * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs * * Return: 0 on success, -errno on failure */ @@ -1324,7 +1492,7 @@ static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) ssize_t vpd_size; char vpd_data[CXLFLASH_VPD_LEN]; char tmp_buf[WWPN_BUF_LEN] = { 0 }; - char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" }; + char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" }; /* Get the VPD data from the device */ vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); @@ -1362,7 +1530,7 @@ static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) * because the conversion service requires that the ASCII * string be terminated. */ - for (k = 0; k < NUM_FC_PORTS; k++) { + for (k = 0; k < cfg->num_fc_ports; k++) { j = ro_size; i = ro_start + PCI_VPD_LRDT_TAG_SIZE; @@ -1391,6 +1559,8 @@ static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) rc = -ENODEV; goto out; } + + dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); } out: @@ -1409,6 +1579,7 @@ static void init_pcr(struct cxlflash_cfg *cfg) { struct afu *afu = cfg->afu; struct sisl_ctrl_map __iomem *ctrl_map; + struct hwq *hwq; int i; for (i = 0; i < MAX_CONTEXT; i++) { @@ -1420,13 +1591,17 @@ static void init_pcr(struct cxlflash_cfg *cfg) writeq_be(0, &ctrl_map->ctx_cap); } - /* Copy frequently used fields into afu */ - afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx); - afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host; - afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl; + /* Copy frequently used fields into hwq */ + for (i = 0; i < afu->num_hwqs; i++) { + hwq = get_hwq(afu, i); + + hwq->ctx_hndl = (u16) cxl_process_element(hwq->ctx); + hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host; + hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl; - /* Program the Endian Control for the master context */ - writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl); + /* Program the Endian Control for the master context */ + writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl); + } } /** @@ -1437,7 +1612,10 @@ static int init_global(struct cxlflash_cfg *cfg) { struct afu *afu = cfg->afu; struct device *dev = &cfg->dev->dev; - u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */ + struct hwq *hwq; + struct sisl_host_map __iomem *hmap; + __be64 __iomem *fc_port_regs; + u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ int i = 0, num_ports = 0; int rc = 0; u64 reg; @@ -1448,16 +1626,18 @@ static int init_global(struct cxlflash_cfg *cfg) goto out; } - dev_dbg(dev, "%s: wwpn0=%016llx wwpn1=%016llx\n", - __func__, wwpn[0], wwpn[1]); + /* Set up RRQ and SQ in HWQ for master issued cmds */ + for (i = 0; i < afu->num_hwqs; i++) { + hwq = get_hwq(afu, i); + hmap = hwq->host_map; - /* Set up RRQ and SQ in AFU for master issued cmds */ - writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start); - writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end); + writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start); + writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end); - if (afu_is_sq_cmd_mode(afu)) { - writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start); - writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end); + if (afu_is_sq_cmd_mode(afu)) { + writeq_be((u64)hwq->hsq_start, &hmap->sq_start); + writeq_be((u64)hwq->hsq_end, &hmap->sq_end); + } } /* AFU configuration */ @@ -1473,26 +1653,25 @@ static int init_global(struct cxlflash_cfg *cfg) if (afu->internal_lun) { /* Only use port 0 */ writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); - num_ports = NUM_FC_PORTS - 1; + num_ports = 0; } else { - writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel); - num_ports = NUM_FC_PORTS; + writeq_be(PORT_MASK(cfg->num_fc_ports), + &afu->afu_map->global.regs.afu_port_sel); + num_ports = cfg->num_fc_ports; } for (i = 0; i < num_ports; i++) { + fc_port_regs = get_fc_port_regs(cfg, i); + /* Unmask all errors (but they are still masked at AFU) */ - writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]); + writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); /* Clear CRC error cnt & set a threshold */ - (void)readq_be(&afu->afu_map->global. - fc_regs[i][FC_CNT_CRCERR / 8]); - writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i] - [FC_CRC_THRESH / 8]); + (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); + writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); /* Set WWPNs. If already programmed, wwpn[i] is 0 */ if (wwpn[i] != 0) - afu_set_wwpn(afu, i, - &afu->afu_map->global.fc_regs[i][0], - wwpn[i]); + afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); /* Programming WWPN back to back causes additional * offline/online transitions and a PLOGI */ @@ -1502,11 +1681,15 @@ static int init_global(struct cxlflash_cfg *cfg) /* Set up master's own CTX_CAP to allow real mode, host translation */ /* tables, afu cmds and read/write GSCSI cmds. */ /* First, unlock ctx_cap write by reading mbox */ - (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */ - writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | - SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | - SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), - &afu->ctrl_map->ctx_cap); + for (i = 0; i < afu->num_hwqs; i++) { + hwq = get_hwq(afu, i); + + (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */ + writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | + SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | + SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), + &hwq->ctrl_map->ctx |