linux.git - Clone of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git

Age	Commit message (Expand)	Author	Files	Lines
2014-05-02	MIPS: allow GIC clockevent device config from other CPUs	Paul Burton	1	-0/+15
2014-03-26	MIPS: Remove gcmpregs.h	Paul Burton	1	-1/+0
2013-07-01	MIPS: GIC: Fix gic_set_affinity infinite loop	Tony Wu	1	-8/+7
2013-05-09	MIPS: Add new GIC clockevent driver.	Raghu Gandham	1	-1/+30
2013-05-09	MIPS: Refactor GIC clocksource code.	Steven J. Hill	1	-0/+16
2013-05-09	MIPS: Move 'gic_frequency' to common location.	Steven J. Hill	1	-0/+1
2013-05-09	MIPS: Move 'gic_present' to common location.	Steven J. Hill	1	-0/+1
2012-09-13	MIPS: Make VPE count to be one-based.	Steven J. Hill	1	-0/+1
2012-09-13	MIPS: Add new end of interrupt functionality for GIC.	Steven J. Hill	1	-1/+1
2012-09-13	MIPS: Add EIC support for GIC.	Steven J. Hill	1	-8/+90
2012-09-13	MIPS: Code clean-ups for the GIC.	Steven J. Hill	1	-24/+16
2012-09-13	MIPS: Make GIC code platform independent.	Steven J. Hill	1	-24/+11
2011-03-29	MIPS: Convert the irq functions to the new names	Thomas Gleixner	1	-1/+1
2011-03-25	MIPS: GIC: Convert to new irq_chip functions	Thomas Gleixner	1	-25/+18
2010-10-07	MIPS: Add missing #inclusions of <linux/irq.h>	David Howells	1	-1/+1
2010-10-04	MIPS: Remove pr_<level> uses of KERN_<level>	Joe Perches	1	-1/+1
2010-10-04	MIPS: GIC: Remove dependencies from Malta files.	Ralf Baechle	1	-2/+1
2009-11-02	MIPS: GIC: Random fixes and enhancements.	Chris Dearman	1	-71/+43
2009-07-03	MIPS: CMP: Extend IPI handling to CPU number	Tim Anderson	1	-0/+4
2009-07-03	MIPS: CMP: Extend the GIC IPI interrupts beyond 32	Tim Anderson	1	-11/+4
2009-06-24	MIPS: Build fix - include <linux/smp.h> into all smp_processor_id() users.	Ralf Baechle	1	-0/+1
2009-04-28	irq: change ->set_affinity() to return status	Yinghai Lu	1	-2/+3
2009-01-12	irq: update all arches for new irq_desc	Mike Travis	1	-1/+1
2008-12-13	cpumask: make irq_set_affinity() take a const struct cpumask	Rusty Russell	1	-3/+3
2008-04-28	[MIPS] Add support for MIPS CMP platform.	Ralf Baechle	1	-0/+295