| Age | Commit message (Expand) | Author | Files | Lines |
| 2019-12-04 | clk: at91: fix update bit maps on CFG_MOR write | Eugen Hristev | 1 | -1/+1 |
| 2019-12-04 | clk: ti: clkctrl: Fix failed to enable error with double udelay timeout | Tony Lindgren | 1 | -2/+3 |
| 2019-12-04 | clk: ti: dra7-atl-clock: Remove ti_clk_add_alias call | Peter Ujfalusi | 1 | -6/+0 |
| 2019-12-04 | clk: sunxi-ng: a80: fix the zero'ing of bits 16 and 18 | Colin Ian King | 1 | -1/+1 |
| 2019-12-04 | clk: sunxi: Fix operator precedence in sunxi_divs_clk_setup | Nathan Chancellor | 1 | -2/+2 |
| 2019-12-04 | clk: at91: avoid sleeping early | Alexandre Belloni | 2 | -5/+20 |
| 2019-12-04 | clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume | Marek Szyprowski | 1 | -0/+6 |
| 2019-12-04 | clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU | Marek Szyprowski | 1 | -2/+19 |
| 2019-12-04 | clk: samsung: exynos5433: Fix error paths | Marek Szyprowski | 1 | -2/+12 |
| 2019-12-04 | clk: at91: sam9x60: fix programmable clock | Eugen Hristev | 1 | -0/+1 |
| 2019-12-04 | clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate | Martin Blumenstingl | 1 | -0/+1 |
| 2019-11-12 | clk: imx8m: Use SYS_PLL1_800M as intermediate parent of CLK_ARM | Leonard Crestez | 1 | -1/+1 |
| 2019-10-29 | clk: ti: dra7: Fix mcasp8 clock bits | Tony Lindgren | 1 | -3/+3 |
| 2019-10-07 | clk: sprd: add missing kfree | Chunyan Zhang | 1 | -0/+2 |
| 2019-10-07 | clk: Make clk_bulk_get_all() return a valid "id" | Bjorn Andersson | 1 | -1/+4 |
| 2019-10-07 | clk: imx: clk-pll14xx: unbypass PLL by default | Peng Fan | 1 | -0/+5 |
| 2019-10-07 | clk: imx: pll14xx: avoid glitch when set rate | Peng Fan | 1 | -1/+21 |
| 2019-10-07 | clk: at91: select parent if main oscillator or bypass is enabled | Eugen Hristev | 1 | -3/+7 |
| 2019-10-07 | clk: qcom: gcc-sdm845: Use floor ops for sdcc clks | Stephen Boyd | 1 | -2/+2 |
| 2019-10-07 | clk: renesas: cpg-mssr: Set GENPD_FLAG_ALWAYS_ON for clock domain | Geert Uytterhoeven | 1 | -1/+2 |
| 2019-10-07 | clk: renesas: mstp: Set GENPD_FLAG_ALWAYS_ON for clock domain | Geert Uytterhoeven | 1 | -1/+2 |
| 2019-10-07 | clk: sunxi: Don't call clk_hw_get_name() on a hw that isn't registered | Stephen Boyd | 1 | -2/+3 |
| 2019-10-07 | clk: zx296718: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -60/+49 |
| 2019-10-07 | clk: sprd: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -2/+3 |
| 2019-10-07 | clk: meson: axg-audio: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -2/+5 |
| 2019-10-07 | clk: sirf: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -4/+8 |
| 2019-10-07 | clk: actions: Don't reference clk_init_data after registration | Stephen Boyd | 1 | -2/+3 |
| 2019-10-07 | clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks | Icenowy Zheng | 1 | -0/+3 |
| 2019-10-07 | clk: ingenic/jz4740: Fix "pll half" divider not read/written properly | Paul Cercueil | 1 | -1/+8 |
| 2019-10-07 | clk: qoriq: Fix -Wunused-const-variable | Nathan Huckleberry | 1 | -1/+1 |
| 2019-10-07 | clk: imx8mq: Mark AHB clock as critical | Abel Vesa | 1 | -1/+2 |
| 2019-10-01 | clk: imx: imx8mm: fix audio pll setting | Peng Fan | 1 | -2/+2 |
| 2019-08-16 | clk: Fix potential NULL dereference in clk_fetch_parent_index() | Martin Blumenstingl | 1 | -1/+2 |
| 2019-08-16 | clk: Fix falling back to legacy parent string matching | Stephen Boyd | 1 | -12/+34 |
| 2019-08-14 | clk: socfpga: stratix10: fix rate caclulationg for cnt_clks | Dinh Nguyen | 1 | -1/+1 |
| 2019-08-08 | clk: samsung: exynos542x: Move MSCL subsystem clocks to its sub-CMU | Marek Szyprowski | 1 | -14/+34 |
| 2019-08-08 | clk: samsung: exynos5800: Move MAU subsystem clocks to MAU sub-CMU | Sylwester Nawrocki | 1 | -11/+43 |
| 2019-08-08 | clk: samsung: Change signature of exynos5_subcmus_init() function | Sylwester Nawrocki | 4 | -36/+49 |
| 2019-07-22 | clk: renesas: cpg-mssr: Fix reset control race condition | Geert Uytterhoeven | 1 | -14/+2 |
| 2019-07-22 | clk: sprd: Select REGMAP_MMIO to avoid compile errors | Chunyan Zhang | 1 | -0/+1 |
| 2019-07-22 | clk: mediatek: mt8183: Register 13MHz clock earlier for clocksource | Weiyi Lu | 1 | -12/+34 |
| 2019-07-22 | clk: at91: generated: Truncate divisor to GENERATED_MAX_DIV + 1 | Codrin Ciubotariu | 1 | -0/+2 |
| 2019-07-17 | Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl... | Linus Torvalds | 113 | -3040/+6985 |
| 2019-07-15 | Merge tag 'mfd-next-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/lee... | Linus Torvalds | 3 | -15/+88 |
| 2019-07-12 | Merge branches 'clk-bcm63xx', 'clk-silabs', 'clk-lochnagar' and 'clk-rockchip... | Stephen Boyd | 16 | -175/+1810 |
| 2019-07-12 | Merge branches 'clk-rpi-cpufreq', 'clk-tegra', 'clk-simplify-provider.h', 'cl... | Stephen Boyd | 16 | -106/+571 |
| 2019-07-12 | Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in... | Stephen Boyd | 9 | -194/+30 |
| 2019-07-12 | Merge branches 'clk-bulk-optional', 'clk-kirkwood', 'clk-socfpga' and 'clk-do... | Stephen Boyd | 5 | -11/+65 |
| 2019-07-12 | Merge branches 'clk-ti', 'clk-samsung', 'clk-imx' and 'clk-allwinner' into cl... | Stephen Boyd | 42 | -2262/+2932 |
| 2019-07-12 | Merge branches 'clk-qcom-gdsc-warn', 'clk-ingenic', 'clk-qcom-qcs404-reset', ... | Stephen Boyd | 22 | -161/+1285 |