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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2020-12-30clk: tegra: Do not return 0 on failureNicolin Chen1-2/+2
2020-12-30clk: mvebu: a3700: fix the XTAL MODE pin to MPP1_9Terry Zhou1-2/+2
2020-12-30clk: ingenic: Fix divider calculation with div tablesPaul Cercueil1-4/+10
2020-12-30clk: sunxi-ng: Make sure divider tables have sentinelJernej Skrabec2-0/+2
2020-12-30clk: s2mps11: Fix a resource leak in error handling paths in the probe functionChristophe JAILLET1-0/+1
2020-12-30clk: at91: sam9x60: remove atmel,osc-bypass supportAlexandre Belloni1-5/+1
2020-12-30clk: ti: Fix memleak in ti_fapll_synth_setupZhang Qilong1-2/+9
2020-12-30clk: tegra: Fix duplicated SE clock entryDmitry Osipenko2-1/+2
2020-12-30clk: meson: Kconfig: fix dependency for G12AKevin Hilman1-0/+1
2020-12-30clk: renesas: r9a06g032: Drop __packed for portabilityGeert Uytterhoeven1-1/+1
2020-11-05clk: ti: clockdomain: fix static checker warningTero Kristo1-0/+2
2020-10-29clk: imx8mq: Fix usdhc parents orderAbel Vesa1-2/+2
2020-10-29clk: bcm2835: add missing release if devm_clk_hw_register failsNavid Emamdoost1-1/+3
2020-10-29clk: at91: clk-main: update key before writing AT91_CKGR_MORClaudiu Beznea1-3/+8
2020-10-29clk: mediatek: add UART0 clock supportHanks Chen1-0/+2
2020-10-29clk: rockchip: Initialize hw to error to avoid undefined behaviorStephen Boyd1-1/+1
2020-10-29clk: keystone: sci-clk: fix parsing assigned-clock data during probeTero Kristo1-1/+1
2020-10-29clk: qcom: gcc-sdm660: Fix wrong parent_mapKonrad Dybcio1-1/+1
2020-10-29clk: meson: g12a: mark fclk_div2 as criticalStefan Agner1-0/+11
2020-10-07clk: samsung: exynos4: mark 'chipid' clock as CLK_IGNORE_UNUSEDMarek Szyprowski1-2/+2
2020-10-07clk: tegra: Always program PLL_E when enabledThierry Reding1-3/+0
2020-10-07clk: socfpga: stratix10: fix the divider for the emac_ptp_free_clkDinh Nguyen1-1/+1
2020-10-01clk: imx: Fix division by zero warning on pfdv2Anson Huang1-0/+6
2020-10-01clk: stratix10: use do_div() for 64-bit calculationDinh Nguyen1-1/+3
2020-10-01clk/ti/adpll: allocate room for terminating nullStephen Kitt1-9/+2
2020-09-23clk: rockchip: Fix initialization of mux_pll_src_4plls_pNathan Chancellor1-1/+1
2020-09-23clk: davinci: Use the correct size when allocating memoryChristophe JAILLET1-1/+1
2020-08-21clk: bcm2835: Do not use prediv with bcm2711's PLLsNicolas Saenz Julienne1-4/+21
2020-08-21clk: clk-atlas6: fix return value check in atlas6_clk_init()Xu Wang1-1/+1
2020-08-21clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clkKonrad Dybcio1-0/+3
2020-08-21clk: qcom: clk-alpha-pll: remove unused/incorrect PLL_CAL_VALJonathan Marek1-2/+0
2020-08-21clk: qcom: gcc: fix sm8150 GPU and NPU clocksJonathan Marek1-2/+6
2020-08-21clk: actions: Fix h_clk for Actions S500 SoCCristian Ciocaltea1-1/+1
2020-08-19clk: bcm63xx-gate: fix last clock availabilityÁlvaro Fernández Rojas1-0/+1
2020-08-19clk: scmi: Fix min and max rate when registering clocks with discrete ratesSudeep Holla1-3/+19
2020-08-19clk: qcom: clk-rpmh: Wait for completion when enabling clocksMike Tipton1-2/+13
2020-07-22clk: qcom: gcc: Add missing UFS clocks for SM8150Vinod Koul1-0/+84
2020-07-22clk: qcom: gcc: Add GPU and NPU clocks for SM8150Vinod Koul1-0/+64
2020-07-22clk: AST2600: Add mux for EMMC clockEddie James1-8/+41
2020-07-22clk: mvebu: ARMADA_AP_CPU_CLK needs to select ARMADA_AP_CP_HELPERNathan Chancellor1-0/+1
2020-06-30clk: sifive: allocate sufficient memory for struct __prci_dataVincent Chen1-1/+4
2020-06-24clk: ast2600: Fix AHB clock divider for A1Eddie James1-6/+25
2020-06-24clk: sprd: return correct type of value for _sprd_pll_recalc_rateChunyan Zhang1-1/+1
2020-06-24clk: bcm2835: Fix return type of bcm2835_register_gateNathan Chancellor1-5/+5
2020-06-24clk: samsung: exynos5433: Add IGNORE_UNUSED flag to sclk_i2s1Marek Szyprowski1-1/+2
2020-06-24clk: ti: composite: fix memory leakTero Kristo1-0/+1
2020-06-24clk: meson: meson8b: Don't rely on u-boot to init all GP_PLL registersMartin Blumenstingl2-0/+13
2020-06-24clk: meson: meson8b: Fix the vclk_div{1, 2, 4, 6, 12}_en gate bitsMartin Blumenstingl1-5/+5
2020-06-24clk: meson: meson8b: Fix the polarity of the RESET_N linesMartin Blumenstingl1-23/+56
2020-06-24clk: meson: meson8b: Fix the first parent of vid_pll_in_selMartin Blumenstingl1-1/+1