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path: root/drivers/cxl
AgeCommit message (Expand)AuthorFilesLines
5 dayscxl/acpi: Fix CXL_ACPI and CXL_PMEM Kconfig tristate mismatchKeith Busch1-0/+1
12 dayscxl/mbox: validate payload size before accessing contents in cxl_payload_from...Davidlohr Bueso1-2/+9
12 dayscxl: Fix race of nvdimm_bus object when creating nvdimm objectsDave Jiang3-2/+42
12 dayscxl: Move devm_cxl_add_nvdimm_bridge() to cxl_pmem.koDave Jiang3-10/+19
2026-02-26cxl: Fix premature commit_end increment on decoder commit failureYuxiong Wang1-2/+1
2026-02-26cxl/core: Fix cxl_dport debugfs EINJ entriesCheatham, Benjamin1-3/+5
2026-02-26cxl/hdm: Fix newline character in dev_err() messagesRobert Richter1-2/+2
2026-02-26cxl/mem: Fix devm_cxl_memdev_edac_release() confusionDan Williams3-32/+38
2026-01-13cxl: Check for invalid addresses returned from translation functions on errorsRobert Richter2-9/+27
2026-01-12cxl/hdm: Fix potential infinite loop in __cxl_dpa_reserve()Li Ming1-1/+1
2026-01-09cxl/acpi: Restore HBIW check before dereferencing platform_dataAlison Schofield1-2/+9
2026-01-09cxl/port: Fix target list setup for multiple decoders sharing the same dportRobert Richter1-1/+1
2026-01-05cxl/region: fix format string for resource_size_tArnd Bergmann1-1/+1
2025-12-05Merge tag 'soc-drivers-6.19-2' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds1-1/+4
2025-12-04Merge tag 'cxl-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds9-213/+298
2025-11-27Merge tag 'cache-for-v6.19' of https://git.kernel.org/pub/scm/linux/kernel/gi...Arnd Bergmann1-1/+4
2025-11-17memregion: Support fine grained invalidate by cpu_cache_invalidate_memregion()Yicong Yang1-1/+4
2025-11-17memregion: Drop unused IORES_DESC_* parameter from cpu_cache_invalidate_memre...Jonathan Cameron1-1/+1
2025-11-14Merge branch 'for-6.19/cxl-prm' into cxl-for-nextDave Jiang4-31/+12
2025-11-14cxl/region: Remove local variable @inc in cxl_port_setup_targets()Robert Richter1-3/+2
2025-11-14cxl/acpi: Group xor arithmetric setup code in a single blockRobert Richter1-7/+4
2025-11-14cxl: Simplify cxl_rd_ops allocation and handlingRobert Richter4-23/+8
2025-11-13Merge branch 'for-6.19/cxl-elc' into cxl-for-nextDave Jiang2-25/+51
2025-11-13Merge branch 'for-6.19/cxl-addr-xlat' into cxl-for-nextDave Jiang3-71/+191
2025-11-12cxl: Clarify comment in spa_maps_hpa()Dave Jiang1-3/+3
2025-11-12cxl: Rename region_res_match_cxl_range() to spa_maps_hpa()Dave Jiang1-5/+5
2025-11-12cxl: Add handling of locked CXL decoderDave Jiang3-0/+30
2025-11-07cxl: Adjust offset calculation for poison injectionDave Jiang1-0/+2
2025-11-03cxl/region: Add support to indicate region has extended linear cacheDave Jiang1-15/+44
2025-11-03cxl: Adjust extended linear cache failure emission in cxl_acpiDave Jiang1-10/+7
2025-11-03cxl/acpi: Make the XOR calculations available for testingAlison Schofield2-11/+43
2025-11-03cxl/region: Refactor address translation funcs for testingAlison Schofield2-60/+148
2025-11-03cxl/pci: replace use of system_wq with system_percpu_wqMarco Crivellari1-1/+1
2025-11-03cxl: fix typos in cdat.c commentsAlok Tiwari1-2/+2
2025-11-03cxl/port: Remove devm_cxl_port_enumerate_dports()Li Ming2-80/+8
2025-10-14cxl/trace: Subtract to find an hpa_alias0 in cxl_poison eventsAlison Schofield1-1/+1
2025-10-14cxl/region: Use %pa printk format to emit resource_size_tAlison Schofield1-2/+2
2025-10-14cxl: Fix match_region_by_range() to use region_res_match_cxl_range()Dave Jiang1-4/+1
2025-10-14cxl: Set range param for region_res_match_cxl_range() as constDave Jiang1-1/+1
2025-10-14cxl/acpi: Fix setup of memory resource in cxl_acpi_set_cache_size()Dave Jiang1-1/+1
2025-10-13cxl/features: Add check for no entries in cxl_feature_infoDave Jiang1-0/+3
2025-10-13cxl/port: Avoid missing port component registers setupLi Ming1-12/+14
2025-09-18Merge branch 'for-6.18/cxl-delay-dport' into cxl-for-nextDave Jiang10-175/+470
2025-09-18cxl: Move port register setup to when first dport appearDave Jiang2-3/+16
2025-09-18cxl: Change sslbis handler to only handle single dportDave Jiang3-15/+12
2025-09-18cxl/test: Adjust the mock version of devm_cxl_switch_port_decoders_setup()Dave Jiang2-3/+5
2025-09-18cxl/test: Add mock version of devm_cxl_add_dport_by_dev()Dave Jiang3-5/+24
2025-09-18cxl: Defer dport allocation for switch portsDave Jiang6-60/+247
2025-09-18cxl/test: Refactor decoder setup to reduce cxl_test burdenDave Jiang6-52/+125
2025-09-17cxl: Add a cached copy of target_map to cxl_decoderDave Jiang5-34/+27
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