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path: root/drivers/gpu/drm/amd/amdgpu
AgeCommit message (Expand)AuthorFilesLines
8 daysdrm/amd: Fix a few more NULL pointer dereference in device cleanupMario Limonciello1-0/+6
8 daysdrm/amd: Fix NULL pointer dereference in device cleanupMario Limonciello1-0/+4
8 daysdrm/amd: Set num IP blocks to 0 if discovery failsMario Limonciello2-2/+4
8 daysdrm/amdgpu: Fix use-after-free race in VM acquireAlysa Liu1-1/+5
8 daysdrm/amd: Disable MES LR compute W/AMario Limonciello2-10/+0
8 daysdrm/amdgpu: add upper bound check on user inputs in wait ioctlSunil Khatri1-0/+5
8 daysdrm/amdgpu/userq: Fix reference leak in amdgpu_userq_wait_ioctlTvrtko Ursulin1-0/+2
8 daysdrm/amdgpu: add upper bound check on user inputs in signal ioctlSunil Khatri1-0/+7
8 daysdrm/amdgpu: ensure no_hw_access is visible before MMIOPerry Yuan1-0/+3
8 daysdrm/amdgpu: Fix kernel-doc comments for some LUT propertiesCristian Ciocaltea1-8/+8
8 daysdrm/amdgpu/vcn5: Add SMU dpm interface typesguttula1-0/+4
2026-03-12drm/amdgpu: Fix error handling in slot resetLijo Lazar1-7/+10
2026-03-12drm/amdgpu: Fix locking bugs in error pathsBart Van Assche1-5/+7
2026-03-12drm/amdgpu: Unlock a mutex before destroying itBart Van Assche1-0/+1
2026-03-12drm/amdgpu/userq: Do not allow userspace to trivially triger kernel warningsTvrtko Ursulin1-4/+4
2026-03-04drm/amdgpu: Refactor amdgpu_gem_va_ioctl for Handling Last Fence Update and T...Srinivasan Shanmugam1-36/+37
2026-03-04drm/amdgpu: keep vga memory on MacBooks with switchable graphicsAlex Deucher1-0/+10
2026-03-04drm/amdgpu: fix sync handling in amdgpu_dma_buf_move_notifyPierre-Eric Pelloux-Prayer1-1/+8
2026-03-04drm/amdgpu: Use 5-level paging if gmc support 57-bit VAPhilip Yang1-17/+0
2026-03-04drm/amdgpu: GPU vm support 5-level page tablePhilip Yang3-1/+23
2026-03-04drm/amdgpu: Protect GPU register accesses in powergated state in some pathsYifan Zhang1-3/+6
2026-03-04drm/amdgpu: avoid sdma ring reset in sriovVictor Zhao1-0/+3
2026-03-04drm/amdgpu: Adjust usleep_range in fence waitCe Sun1-1/+1
2026-03-04drm/amdgpu: return when ras table checksum is errorGangliang Xie1-1/+3
2026-03-04drm/amdgpu: Skip vcn poison irq release on VFLijo Lazar1-1/+3
2026-03-04drm/amdgpu: validate user queue size constraintsJesse.Zhang1-0/+11
2026-03-04drm/amdgpu: mark invalid records with U64_MAXGangliang Xie1-0/+6
2026-03-04drm/amdgpu: Skip loading SDMA_RS64 in VFYuBiao Wang1-0/+1
2026-03-04drm/amdgpu: Refactor amdgpu_gem_va_ioctl for Handling Last Fence Update and T...Srinivasan Shanmugam1-53/+82
2026-03-04drm/amdgpu: avoid a warning in timedout job handlerAlex Deucher1-1/+2
2026-03-04drm/amdgpu: add support for HDP IP version 6.1.1Tim Huang1-0/+1
2026-03-04drm/amdgpu/ras: Move ras data alloc before bad page checkAsad Kamal1-5/+5
2026-03-04drm/amdgpu: fix the calculation of RAS bad page numberTao Zhou1-4/+0
2026-03-04drm/amdgpu: fix NULL pointer issue buffer funcsLikun Gao1-1/+2
2026-02-26drm/amdgpu: Fix missing unwind in amdgpu_ib_schedule() error pathSrinivasan Shanmugam1-1/+1
2026-02-26drm/amdgpu: clean up the amdgpu_cs_parser_bosSunil Khatri1-2/+4
2026-02-26drm/amdgpu/sdma6: enable queue resets unconditionallyAlex Deucher1-12/+3
2026-02-26drm/amdgpu/sdma5.2: enable queue resets unconditionallyAlex Deucher1-19/+3
2026-02-26drm/amdgpu/sdma5: enable queue resets unconditionallyAlex Deucher1-12/+3
2026-02-26drm/amdgpu: Fix memory leak in amdgpu_ras_init()Zilin Guan1-1/+1
2026-02-26drm/amdgpu: Use kvfree instead of kfree in amdgpu_gmc_get_nps_memranges()Zilin Guan1-1/+1
2026-02-26drm/amdgpu: Fix memory leak in amdgpu_acpi_enumerate_xcc()Zilin Guan1-1/+3
2026-02-26drm/amdgpu: Drop MMIO_REMAP domain bit and keep it InternalChristian König4-44/+59
2026-02-26drm/amdgpu/ttm: Pin 4K MMIO_REMAP Singleton BO at Init v2Srinivasan Shanmugam1-0/+32
2026-02-26drm/amdgpu: Use explicit VCN instance 0 in SR-IOV initSrinivasan Shanmugam1-22/+23
2026-02-26drm/amd: Drop "amdgpu kernel modesetting enabled" messageMario Limonciello (AMD)1-1/+0
2026-02-03drm/amdgpu: Fix double deletion of validate_listHarish Kasiviswanathan1-7/+7
2026-02-03Revert "drm/amd: Check if ASPM is enabled from PCIe subsystem"Bert Karwatzki1-3/+0
2026-02-03drm/amd: Set minimum version for set_hw_resource_1 on gfx11 to 0x52Mario Limonciello1-1/+1
2026-01-29drm/amdgpu/gfx12: adjust KGQ reset sequenceAlex Deucher1-10/+13
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