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path: root/drivers/gpu/drm/i915/display/intel_crtc.c
AgeCommit message (Expand)AuthorFilesLines
2023-12-09drm/i915: Stop accessing crtc->state from the flip done irqVille Syrjälä1-1/+8
2023-09-28drm/i915: Add helpers for BW management on shared display linksImre Deak1-0/+1
2023-09-27drm/i915/dsb: Evade transcoder undelayed vblank when using DSBVille Syrjälä1-1/+4
2023-09-27drm/i915/dsb: Load LUTs using the DSB during vblankVille Syrjälä1-1/+3
2023-09-20drm/i915: Implement transcoder LRR for TGL+Ville Syrjälä1-4/+5
2023-09-20drm/i915: Assert that VRR is off during vblank evasion if necessaryVille Syrjälä1-0/+4
2023-09-20drm/i915: Adjust seamless_m_n flag behaviourVille Syrjälä1-1/+1
2023-09-20drm/i915: Enable VRR later during fastsetsVille Syrjälä1-14/+21
2023-09-20drm/i915: Extract intel_crtc_vblank_evade_scanlines()Ville Syrjälä1-22/+31
2023-09-20drm/i915: Change intel_pipe_update_{start,end}() calling conventionVille Syrjälä1-6/+12
2023-09-20drm/i915: Move psr unlock out from the pipe update critical sectionVille Syrjälä1-4/+5
2023-05-24drm/i915/display: Move display runtime info to display structureMatt Roper1-1/+1
2023-05-16drm/i915/irq: split out display irq handlingJani Nikula1-1/+1
2023-05-15drm/i915/display: add i915 parameter to I915_STATE_WARN()Jani Nikula1-1/+3
2023-05-15drm/i915/crtc: replace I915_STATE_WARN_ON() with I915_STATE_WARN()Jani Nikula1-1/+3
2023-04-13drm/i915: Evade transcoder's vblank when doing seamless M/N changesVille Syrjälä1-0/+7
2023-04-12drm/i915/vrr: Tell intel_crtc_update_active_timings() about VRR explicitlyVille Syrjälä1-1/+2
2023-03-21drm/i915/debugfs: switch crtc debugfs to struct intel_crtcJani Nikula1-1/+1
2023-03-18drm/i915: Update vblank timestamping stuff on seamless M/N changeVille Syrjälä1-0/+8
2023-02-23drm/i915: Mark FIFO underrun disabled earlierVille Syrjälä1-0/+3
2023-01-18drm/i915/irq: split out vblank/scanline code to intel_vblank.[ch]Jani Nikula1-0/+1
2022-10-22drm/i915: Introduce intel_crtc_needs_color_update()Ville Syrjälä1-2/+1
2022-10-22drm/i915: Introduce intel_crtc_needs_fastset()Ville Syrjälä1-1/+1
2022-10-07drm/i915: Clean up some namespacingVille Syrjälä1-2/+2
2022-09-30drm/i915: Split up intel_color_init()Ville Syrjälä1-2/+1
2022-07-26drm: Remove unnecessary include statements of drm_plane_helper.hThomas Zimmermann1-1/+0
2022-04-08drm/i915/display: Fix warnings about PSR lock not heldJosé Roberto de Souza1-4/+4
2022-04-06drm/i915/display/psr: Lock and unlock PSR around pipe updatesJosé Roberto de Souza1-1/+5
2022-03-15drm/i915: Stash DRRS state under intel_crtcVille Syrjälä1-0/+2
2022-03-03drm/i915: Fix the async flip wm0/ddb optimizationVille Syrjälä1-2/+2
2022-01-05drm/i915: stop including i915_irq.h from i915_drv.hJani Nikula1-0/+1
2021-12-09drm/i915: s/intel_get_first_crtc/intel_first_crtc/Ville Syrjälä1-1/+1
2021-12-09drm/i915: Relocate intel_crtc_for_plane()Ville Syrjälä1-14/+0
2021-12-09drm/i915: Nuke {pipe,plane}_to_crtc_mapping[]Ville Syrjälä1-26/+18
2021-12-09drm/i915/trace: split out display trace to a separate fileJani Nikula1-2/+2
2021-12-03drm/i915/crtc: un-inline some crtc functions and move to intel_crtc.[ch]Jani Nikula1-0/+42
2021-11-23drm/i915/dsi: split out icl_dsi.hJani Nikula1-1/+1
2021-11-18drm/i915: Do vblank evasion correctly if vrr push has already been sentVille Syrjälä1-3/+7
2021-11-18drm/i915: Move vrr push after the frame counter sampling againVille Syrjälä1-3/+16
2021-11-10drm/i915: Use vblank workers for gamma updatesVille Syrjälä1-2/+74
2021-11-10drm/i915: Do vrr push before sampling the frame counterVille Syrjälä1-3/+3
2021-07-30drm/i915/display: remove explicit CNL handling from intel_crtc.cLucas De Marchi1-1/+1
2021-06-24drm/i915: s/intel_crtc/crtc/Ville Syrjälä1-4/+4
2021-04-14drm/i915/display: rename display version macrosLucas De Marchi1-2/+2
2021-03-23drm/i915/display: Simplify GLK display version testsMatt Roper1-1/+1
2021-03-23drm/i915/display: Eliminate most usage of INTEL_GEN()Matt Roper1-10/+10
2021-03-05drm/i915: Fix DSI TE max_vblank_count handlingVille Syrjälä1-3/+2
2021-03-05drm/i915: Don't try to query the frame counter for disabled pipesVille Syrjälä1-0/+3
2021-03-05drm/i915: Move pipe enable/disable tracepoints to intel_crtc_vblank_{on,off}()Ville Syrjälä1-0/+14
2021-02-18drm/i915: Nuke INTEL_OUTPUT_FORMAT_INVALIDVille Syrjälä1-1/+0
generated by cgit v1.2.3 (git 2.25.1) at 2025-07-17 19:58:53 +0000