path: root/arch/arm64/boot/dts/nvidia/tegra210-p2371-2180.dts

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "tegra210-p2180.dtsi"
#include "tegra210-p2597.dtsi"

/ {
	model = "NVIDIA Jetson TX1 Developer Kit";
	compatible = "nvidia,p2371-2180", "nvidia,tegra210";

	pcie@1003000 {
		status = "okay";

		hvddio-pex-supply = <&vdd_1v8>;
		dvddio-pex-supply = <&vdd_pex_1v05>;
		vddio-pex-ctl-supply = <&vdd_1v8>;

		pci@1,0 {
			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
			phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
			status = "okay";
		};

		pci@2,0 {
			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
			phy-names = "pcie-0";
			status = "okay";
		};
	};

	host1x@50000000 {
		dsi@54300000 {
			status = "okay";

			avdd-dsi-csi-supply = <&vdd_dsi_csi>;

			panel@0 {
				compatible = "auo,b080uan01";
				reg = <0>;

				enable-gpios = <&gpio TEGRA_GPIO(V, 2)
						GPIO_ACTIVE_HIGH>;
				power-supply = <&vdd_5v0_io>;
				backlight = <&backlight>;
			};
		};
	};

	i2c@7000c400 {
		backlight: backlight@2c {
			compatible = "ti,lp8557";
			reg = <0x2c>;
			power-supply = <&vdd_3v3_sys>;

			dev-ctrl = /bits/ 8 <0x80>;
			init-brt = /bits/ 8 <0xff>;

			pwms = <&pwm 0 29334>;
			pwm-names = "lp8557";

			/* boost frequency 1 MHz */
			rom-13h {
				rom-addr = /bits/ 8 <0x13>;
				rom-val = /bits/ 8 <0x01>;
			};

			/* 3 LED string */
			rom-14h {
				rom-addr = /bits/ 8 <0x14>;
				rom-val = /bits/ 8 <0x87>;
			};
		};
	};

	i2c@7000c500 {
		/* carrier board ID EEPROM */
		eeprom@57 {
			compatible = "atmel,24c02";
			reg = <0x57>;

			label = "system";
			vcc-supply = <&vdd_1v8>;
			address-width = <8>;
			pagesize = <8>;
			size = <256>;
			read-only;
		};
	};

	clock@70110000 {
		status = "okay";

		nvidia,cf = <6>;
		nvidia,ci = <0>;
		nvidia,cg = <2>;
		nvidia,droop-ctrl = <0x00000f00>;
		nvidia,force-mode = <1>;
		nvidia,sample-rate = <25000>;

		nvidia,pwm-min-microvolts = <708000>;
		nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
		nvidia,pwm-to-pmic;
		nvidia,pwm-tristate-microvolts = <1000000>;
		nvidia,pwm-voltage-step-microvolts = <19200>;

		pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
		pinctrl-0 = <&dvfs_pwm_active_state>;
		pinctrl-1 = <&dvfs_pwm_inactive_state>;
	};

	aconnect@702c0000 {
		status = "okay";

		ahub@702d0800 {
			status = "okay";

			admaif@702d0000 {
				status = "okay";
			};

			i2s@702d1000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s1_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s1_ep>;
						};
					};

					i2s1_port: port@1 {
						reg = <1>;

						i2s1_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			i2s@702d1100 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s2_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s2_ep>;
						};
					};

					i2s2_port: port@1 {
						reg = <1>;

						i2s2_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			i2s@702d1200 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s3_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s3_ep>;
						};
					};

					i2s3_port: port@1 {
						reg = <1>;

						i2s3_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			i2s@702d1300 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s4_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s4_ep>;
						};
					};

					i2s4_port: port@1 {
						reg = <1>;

						i2s4_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			i2s@702d1400 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						i2s5_cif_ep: endpoint {
							remote-endpoint = <&xbar_i2s5_ep>;
						};
					};

					i2s5_port: port@1 {
						reg = <1>;

						i2s5_dap_ep: endpoint {
							dai-format = "i2s";
							/* Placeholder for external Codec */
						};
					};
				};
			};

			sfc@702d2000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						sfc1_cif_in_ep: endpoint {
							remote-endpoint = <&xbar_sfc1_in_ep>;
						};
					};

					sfc1_out_port: port@1 {
						reg = <1>;

						sfc1_cif_out_ep: endpoint {
							remote-endpoint = <&xbar_sfc1_out_ep>;
						};
					};
				};
			};

			sfc@702d2200 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						sfc2_cif_in_ep: endpoint {
							remote-endpoint = <&xbar_sfc2_in_ep>;
						};
					};

					sfc2_out_port: port@1 {
						reg = <1>;

						sfc2_cif_out_ep: endpoint {
							remote-endpoint = <&xbar_sfc2_out_ep>;
						};
					};
				};
			};

			sfc@702d2400 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						sfc3_cif_in_ep: endpoint {
							remote-endpoint = <&xbar_sfc3_in_ep>;
						};
					};

					sfc3_out_port: port@1 {
						reg = <1>;

						sfc3_cif_out_ep: endpoint {
							remote-endpoint = <&xbar_sfc3_out_ep>;
						};
					};
				};
			};

			sfc@702d2600 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						sfc4_cif_in_ep: endpoint {
							remote-endpoint = <&xbar_sfc4_in_ep>;
						};
					};

					sfc4_out_port: port@1 {
						reg = <1>;

						sfc4_cif_out_ep: endpoint {
							remote-endpoint = <&xbar_sfc4_out_ep>;
						};
					};
				};
			};

			amx@702d3000 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						amx1_in1_ep: endpoint {
							remote-endpoint = <&xbar_amx1_in1_ep>;
						};
					};

					port@1 {
						reg = <1>;

						amx1_in2_ep: endpoint {
							remote-endpoint = <&xbar_amx1_in2_ep>;
						};
					};

					port@2 {
						reg = <2>;

						amx1_in3_ep: endpoint {
							remote-endpoint = <&xbar_amx1_in3_ep>;
						};
					};

					port@3 {
						reg = <3>;

						amx1_in4_ep: endpoint {
							remote-endpoint = <&xbar_amx1_in4_ep>;
						};
					};

					amx1_out_port: port@4 {
						reg = <4>;

						amx1_out_ep: endpoint {
							remote-endpoint = <&xbar_amx1_out_ep>;
						};
					};
				};
			};

			amx@702d3100 {
				status = "okay";

				ports {
					#address-cells = <1>;
					#size-cells = <0>;

					port@0 {
						reg = <0>;

						amx2_in1_ep: endpoint {
							remote-endpoint = <&xbar_amx2_in1_ep>;
						};
					};

					port@1 {
						reg = <1>;

						amx2_in2_ep: endpoint {
							remote-endpoint = <&xbar_amx2_in2_ep>;
						};
					};

					amx2_in3_port: