path: root/drivers/cxl/cxlmem.h

/* SPDX-License-Identifier: GPL-2.0-only */
/* Copyright(c) 2020-2021 Intel Corporation. */
#ifndef __CXL_MEM_H__
#define __CXL_MEM_H__
#include <uapi/linux/cxl_mem.h>
#include <linux/pci.h>
#include <linux/cdev.h>
#include <linux/uuid.h>
#include <linux/node.h>
#include <cxl/event.h>
#include <cxl/mailbox.h>
#include "cxl.h"

/* CXL 2.0 8.2.8.5.1.1 Memory Device Status Register */
#define CXLMDEV_STATUS_OFFSET 0x0
#define   CXLMDEV_DEV_FATAL BIT(0)
#define   CXLMDEV_FW_HALT BIT(1)
#define   CXLMDEV_STATUS_MEDIA_STATUS_MASK GENMASK(3, 2)
#define     CXLMDEV_MS_NOT_READY 0
#define     CXLMDEV_MS_READY 1
#define     CXLMDEV_MS_ERROR 2
#define     CXLMDEV_MS_DISABLED 3
#define CXLMDEV_READY(status)                                                  \
	(FIELD_GET(CXLMDEV_STATUS_MEDIA_STATUS_MASK, status) ==                \
	 CXLMDEV_MS_READY)
#define   CXLMDEV_MBOX_IF_READY BIT(4)
#define   CXLMDEV_RESET_NEEDED_MASK GENMASK(7, 5)
#define     CXLMDEV_RESET_NEEDED_NOT 0
#define     CXLMDEV_RESET_NEEDED_COLD 1
#define     CXLMDEV_RESET_NEEDED_WARM 2
#define     CXLMDEV_RESET_NEEDED_HOT 3
#define     CXLMDEV_RESET_NEEDED_CXL 4
#define CXLMDEV_RESET_NEEDED(status)                                           \
	(FIELD_GET(CXLMDEV_RESET_NEEDED_MASK, status) !=                       \
	 CXLMDEV_RESET_NEEDED_NOT)

/**
 * struct cxl_memdev - CXL bus object representing a Type-3 Memory Device
 * @dev: driver core device object
 * @cdev: char dev core object for ioctl operations
 * @cxlds: The device state backing this device
 * @detach_work: active memdev lost a port in its ancestry
 * @cxl_nvb: coordinate removal of @cxl_nvd if present
 * @cxl_nvd: optional bridge to an nvdimm if the device supports pmem
 * @endpoint: connection to the CXL port topology for this memory device
 * @id: id number of this memdev instance.
 * @depth: endpoint port depth
 */
struct cxl_memdev {
	struct device dev;
	struct cdev cdev;
	struct cxl_dev_state *cxlds;
	struct work_struct detach_work;
	struct cxl_nvdimm_bridge *cxl_nvb;
	struct cxl_nvdimm *cxl_nvd;
	struct cxl_port *endpoint;
	int id;
	int depth;
};

static inline struct cxl_memdev *to_cxl_memdev(struct device *dev)
{
	return container_of(dev, struct cxl_memdev, dev);
}

static inline struct cxl_port *cxled_to_port(struct cxl_endpoint_decoder *cxled)
{
	return to_cxl_port(cxled->cxld.dev.parent);
}

static inline struct cxl_port *cxlrd_to_port(struct cxl_root_decoder *cxlrd)
{
	return to_cxl_port(cxlrd->cxlsd.cxld.dev.parent);
}

static inline struct cxl_memdev *
cxled_to_memdev(struct cxl_endpoint_decoder *cxled)
{
	struct cxl_port *port = to_cxl_port(cxled->cxld.dev.parent);

	return to_cxl_memdev(port->uport_dev);
}

bool is_cxl_memdev(const struct device *dev);
static inline bool is_cxl_endpoint(struct cxl_port *port)
{
	return is_cxl_memdev(port->uport_dev);
}

struct cxl_memdev *devm_cxl_add_memdev(struct device *host,
				       struct cxl_dev_state *cxlds);
int devm_cxl_sanitize_setup_notifier(struct device *host,
				     struct cxl_memdev *cxlmd);
struct cxl_memdev_state;
int devm_cxl_setup_fw_upload(struct device *host, struct cxl_memdev_state *mds);
int devm_cxl_dpa_reserve(struct cxl_endpoint_decoder *cxled,
			 resource_size_t base, resource_size_t len,
			 resource_size_t skipped);

static inline struct cxl_ep *cxl_ep_load(struct cxl_port *port,
					 struct cxl_memdev *cxlmd)
{
	if (!port)
		return NULL;

	return xa_load(&port->endpoints, (unsigned long)&cxlmd->dev);
}

/**
 * struct cxl_mbox_cmd - A command to be submitted to hardware.
 * @opcode: (input) The command set and command submitted to hardware.
 * @payload_in: (input) Pointer to the input payload.
 * @payload_out: (output) Pointer to the output payload. Must be allocated by
 *		 the caller.
 * @size_in: (input) Number of bytes to load from @payload_in.
 * @size_out: (input) Max number of bytes loaded into @payload_out.
 *            (output) Number of bytes generated by the device. For fixed size
 *            outputs commands this is always expected to be deterministic. For
 *            variable sized output commands, it tells the exact number of bytes
 *            written.
 * @min_out: (input) internal command output payload size validation
 * @poll_count: (input) Number of timeouts to attempt.
 * @poll_interval_ms: (input) Time between mailbox background command polling
 *                    interval timeouts.
 * @return_code: (output) Error code returned from hardware.
 *
 * This is the primary mechanism used to send commands to the hardware.
 * All the fields except @payload_* correspond exactly to the fields described in
 * Command Register section of the CXL 2.0 8.2.8.4.5. @payload_in and
 * @payload_out are written to, and read from the Command Payload Registers
 * defined in CXL 2.0 8.2.8.4.8.
 */
struct cxl_mbox_cmd {
	u16 opcode;
	void *payload_in;
	void *payload_out;
	size_t size_in;
	size_t size_out;
	size_t min_out;
	int poll_count;
	int poll_interval_ms;
	u16 return_code;
};

/*
 * Per CXL 3.0 Section 8.2.8.4.5.1
 */
#define CMD_CMD_RC_TABLE							\
	C(SUCCESS, 0, NULL),							\
	C(BACKGROUND, -ENXIO, "background cmd started successfully"),           \
	C(INPUT, -ENXIO, "cmd input was invalid"),				\
	C(UNSUPPORTED, -ENXIO, "cmd is not supported"),				\
	C(INTERNAL, -ENXIO, "internal device error"),				\
	C(RETRY, -ENXIO, "temporary error, retry once"),			\
	C(BUSY, -ENXIO, "ongoing background operation"),			\
	C(MEDIADISABLED, -ENXIO, "media access is disabled"),			\
	C(FWINPROGRESS, -ENXIO,	"one FW package can be transferred at a time"), \
	C(FWOOO, -ENXIO, "FW package content was transferred out of order"),    \
	C(FWAUTH, -ENXIO, "FW package authentication failed"),			\
	C(FWSLOT, -ENXIO, "FW slot is not supported for requested operation"),  \
	C(FWROLLBACK, -ENXIO, "rolled back to the previous active FW"),         \
	C(FWRESET, -ENXIO, "FW failed to activate, needs cold reset"),		\
	C(HANDLE, -ENXIO, "one or more Event Record Handles were invalid"),     \
	C(PADDR, -EFAULT, "physical address specified is invalid"),		\
	C(POISONLMT, -EBUSY, "poison injection limit has been reached"),        \
	C(MEDIAFAILURE, -ENXIO, "permanent issue with the media"),		\
	C(ABORT, -ENXIO, "background cmd was aborted by device"),               \
	C(SECURITY, -ENXIO, "not valid in the current security state"),         \
	C(PASSPHRASE, -ENXIO, "phrase doesn't match current set passphrase"),   \
	C(MBUNSUPPORTED, -ENXIO, "unsupported on the mailbox it was issued on"),\
	C(PAYLOADLEN, -ENXIO, "invalid payload length"),			\
	C(LOG, -ENXIO, "invalid or unsupported log page"),			\
	C(INTERRUPTED, -ENXIO, "asynchronous event occured"),			\
	C(FEATUREVERSION, -ENXIO, "unsupported feature version"),		\
	C(FEATURESELVALUE, -ENXIO, "unsupported feature selection value"),	\
	C(FEATURETRANSFERIP, -ENXIO, "feature transfer in progress"),		\
	C(FEATURETRANSFEROOO, -ENXIO, "feature transfer out of order"),		\
	C(RESOURCEEXHAUSTED, -ENXIO, "resources are exhausted"),		\
	C(EXTLIST, -ENXIO, "invalid Extent List"),				\

#undef C
#define C(a, b, c) CXL_MBOX_CMD_RC_##a
enum  { CMD_CMD_RC_TABLE };
#undef C
#define C(a, b, c) { b, c }
struct cxl_mbox_cmd_rc {
	int err;
	const char *desc;
};

static const
struct cxl_mbox_cmd_rc cxl_mbox_cmd_rctable[] ={ CMD_CMD_RC_TABLE };
#undef C

static inline const char *cxl_mbox_cmd_rc2str(struct cxl_mbox_cmd *mbox_cmd)
{
	return cxl_mbox_cmd_rctable[mbox_cmd->return_code].desc;
}

static inline int cxl_mbox_cmd_rc2errno(struct cxl_mbox_cmd *mbox_cmd)
{
	return cxl_mbox_cmd_rctable[mbox_cmd->return_code].err;
}

/*
 * CXL 2.0 - Memory capacity multiplier
 * See Section 8.2.9.5
 *
 * Volatile, Persistent, and Partition capacities are specified to be in
 * multiples of 256MB - define a multiplier to convert to/from bytes.
 */
#define CXL_CAPACITY_MULTIPLIER SZ_256M

/*
 * Event Interrupt Policy
 *
 * CXL rev 3.0 section 8.2.9.2.4; Table 8-52
 */
enum cxl_event_int_mode {
	CXL_INT_NONE		= 0x00,
	CXL_INT_MSI_MSIX	= 0x01,
	CXL_INT_FW		= 0x02
};
struct cxl_event_interrupt_policy {
	u8 info_settings;
	u8 warn_settings;
	u8 failure_settings;
	u8 fatal_settings;
} __packed;

/**
 * struct cxl_event_state - Event log driver state
 *
 * @buf: Buffer to receive event data
 * @log_lock: Serialize event_buf and log use
 */
struct cxl_event_state {
	struct cxl_get_event_payload *buf;
	struct mutex log_lock;
};

/* Device enabled poison commands */
enum poison_cmd_enabled_bits {
	CXL_POISON_ENABLED_LIST,
	CXL_POISON_ENABLED_INJECT,
	CXL_POISON_ENABLED_CLEAR,
	CXL_POISON_ENABLED_SCAN_CAPS,
	CXL_POISON_ENABLED_SCAN_MEDIA,
	CXL_POISON_ENABLED_SCAN_RESULTS,
	CXL_POISON_ENABLED_MAX
};

/* Device enabled security commands */
enum security_cmd_enabled_bits {
	CXL_SEC_ENABLED_SANITIZE,
	CXL_SEC_ENABLED_SECURE_ERASE,
	CXL_SEC_ENABLED_GET_SECURITY_STATE,
	CXL_SEC_ENABLED_SET_PASSPHRASE,
	CXL_SEC_ENABLED_DISABLE_PASSPHRASE,
	CXL_SEC_ENABLED_UNLOCK,
	CXL_SEC_ENABLED_FREEZE_SECURITY,
	CXL_SEC_ENABLED_PASSPHRASE_SECURE_ERASE,
	CXL_SEC_ENABLED_MAX
};

/**
 * struct cxl_poison_state - Driver poison state info
 *
 * @max_errors: Maximum media error records held in device cache
 * @enabled_cmds: All poison commands enabled in the CEL
 * @list_out: The poison list payload returned by device
 * @lock: Protect reads of the poison list
 *
 * Reads of the poison list are synchronized to ensure that a reader
 * does not get an incomplete list because their request overlapped
 * (was interrupted or preceded by) another read request of the same
 * DPA range. CXL Spec 3.0 Section 8.2.9.8.4.1
 */
struct cxl_poison_state {
	u32 max_errors;
	DECLARE_BITMAP(enabled_cmds, CXL_POISON_ENABLED_MAX);
	struct cxl_mbox_poison_out *list_out;
	struct mutex lock;  /* Protect reads of poison list */
};

/*
 * Get FW Info
 * CXL rev 3.0 section 8.2.9.3.1; Table 8-56
 */
struct cxl_mbox_get_fw_info {
	u8 num_slots;
	u8 slot_info;
	u8 activation_cap;
	u8 reserved[13];
	char slot_1_revision[16];
	char slot_2_revision[16];
	char slot_3_revision[16];
	char slot_4_revision[16];
} __packed;

#define CXL_FW_INFO_SLOT_INFO_CUR_MASK			GENMASK(2, 0)
#define CXL_FW_INFO_SLOT_INFO_NEXT_MASK			GENMASK(5, 3)
#define CXL_FW_INFO_SLOT_INFO_NEXT_SHIFT		3
#define CXL_FW_INFO_ACTIVATION_CAP_HAS_LIVE_ACTIVATE	BIT(0)

/*
 * Transfer FW Input Payload
 * CXL rev 3.0 section 8.2.9.3.2; Table 8-57
 */
struct cxl_mbox_transfer_fw {
	u8 action;
	u8