path: root/drivers/gpu/drm/i915/display/intel_modeset_setup.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2022 Intel Corporation
 *
 * Read out the current hardware modeset state, and sanitize it to the current
 * state.
 */

#include <drm/drm_atomic_uapi.h>
#include <drm/drm_atomic_state_helper.h>

#include "i915_drv.h"
#include "i915_reg.h"
#include "i9xx_wm.h"
#include "intel_atomic.h"
#include "intel_bw.h"
#include "intel_color.h"
#include "intel_crtc.h"
#include "intel_crtc_state_dump.h"
#include "intel_ddi.h"
#include "intel_de.h"
#include "intel_display.h"
#include "intel_display_power.h"
#include "intel_display_types.h"
#include "intel_dmc.h"
#include "intel_fifo_underrun.h"
#include "intel_modeset_setup.h"
#include "intel_pch_display.h"
#include "intel_tc.h"
#include "intel_vblank.h"
#include "intel_wm.h"
#include "skl_watermark.h"

static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
					      struct drm_modeset_acquire_ctx *ctx)
{
	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
	struct intel_crtc_state *crtc_state =
		to_intel_crtc_state(crtc->base.state);
	struct intel_plane *plane;
	struct drm_atomic_state *state;
	struct intel_crtc *temp_crtc;
	enum pipe pipe = crtc->pipe;

	if (!crtc_state->hw.active)
		return;

	for_each_intel_plane_on_crtc(&i915->drm, crtc, plane) {
		const struct intel_plane_state *plane_state =
			to_intel_plane_state(plane->base.state);

		if (plane_state->uapi.visible)
			intel_plane_disable_noatomic(crtc, plane);
	}

	state = drm_atomic_state_alloc(&i915->drm);
	if (!state) {
		drm_dbg_kms(&i915->drm,
			    "failed to disable [CRTC:%d:%s], out of memory",
			    crtc->base.base.id, crtc->base.name);
		return;
	}

	state->acquire_ctx = ctx;
	to_intel_atomic_state(state)->internal = true;

	/* Everything's already locked, -EDEADLK can't happen. */
	for_each_intel_crtc_in_pipe_mask(&i915->drm, temp_crtc,
					 BIT(pipe) |
					 intel_crtc_bigjoiner_slave_pipes(crtc_state)) {
		struct intel_crtc_state *temp_crtc_state =
			intel_atomic_get_crtc_state(state, temp_crtc);
		int ret;

		ret = drm_atomic_add_affected_connectors(state, &temp_crtc->base);

		drm_WARN_ON(&i915->drm, IS_ERR(temp_crtc_state) || ret);
	}

	i915->display.funcs.display->crtc_disable(to_intel_atomic_state(state), crtc);

	drm_atomic_state_put(state);

	drm_dbg_kms(&i915->drm,
		    "[CRTC:%d:%s] hw state adjusted, was enabled, now disabled\n",
		    crtc->base.base.id, crtc->base.name);

	crtc->active = false;
	crtc->base.enabled = false;

	if (crtc_state->shared_dpll)
		intel_unreference_shared_dpll_crtc(crtc,
						   crtc_state->shared_dpll,
						   &crtc_state->shared_dpll->state);
}

static void set_encoder_for_connector(struct intel_connector *connector,
				      struct intel_encoder *encoder)
{
	struct drm_connector_state *conn_state = connector->base.state;

	if (conn_state->crtc)
		drm_connector_put(&connector->base);

	if (encoder) {
		conn_state->best_encoder = &encoder->base;
		conn_state->crtc = encoder->base.crtc;
		drm_connector_get(&connector->base);
	} else {
		conn_state->best_encoder = NULL;
		conn_state->crtc = NULL;
	}
}

static void reset_encoder_connector_state(struct intel_encoder *encoder)
{
	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
	struct intel_connector *connector;
	struct drm_connector_list_iter conn_iter;

	drm_connector_list_iter_begin(&i915->drm, &conn_iter);
	for_each_intel_connector_iter(connector, &conn_iter) {
		if (connector->base.encoder != &encoder->base)
			continue;

		set_encoder_for_connector(connector, NULL);

		connector->base.dpms = DRM_MODE_DPMS_OFF;
		connector->base.encoder = NULL;
	}
	drm_connector_list_iter_end(&conn_iter);
}

static void reset_crtc_encoder_state(struct intel_crtc *crtc)
{
	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
	struct intel_encoder *encoder;

	for_each_encoder_on_crtc(&i915->drm, &crtc->base, encoder) {
		reset_encoder_connector_state(encoder);
		encoder->base.crtc = NULL;
	}
}

static void intel_crtc_disable_noatomic_complete(struct intel_crtc *crtc)
{
	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
	struct intel_bw_state *bw_state =
		to_intel_bw_state(i915->display.bw.obj.state);
	struct intel_cdclk_state *cdclk_state =
		to_intel_cdclk_state(i915->display.cdclk.obj.state);
	struct intel_dbuf_state *dbuf_state =
		to_intel_dbuf_state(i915->display.dbuf.obj.state);
	struct intel_crtc_state *crtc_state =
		to_intel_crtc_state(crtc->base.state);
	enum pipe pipe = crtc->pipe;

	__drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
	intel_crtc_free_hw_state(crtc_state);
	intel_crtc_state_reset(crtc_state, crtc);

	reset_crtc_encoder_state(crtc);

	intel_fbc_disable(crtc);
	intel_update_watermarks(i915);

	intel_display_power_put_all_in_set(i915, &crtc->enabled_power_domains);

	cdclk_state->min_cdclk[pipe] = 0;
	cdclk_state->min_voltage_level[