path: root/drivers/gpu/drm/msm/dsi/dsi.xml.h

#ifndef DSI_XML
#define DSI_XML

/* Autogenerated file, DO NOT EDIT manually!

This file was generated by the rules-ng-ng headergen tool in this git repository:
http://github.com/freedreno/envytools/
git clone https://github.com/freedreno/envytools.git

The rules-ng-ng source files this header was generated from are:
- /home/robclark/src/freedreno/envytools/rnndb/msm.xml                 (    676 bytes, from 2015-05-20 20:03:14)
- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml (   1572 bytes, from 2016-02-10 17:07:21)
- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml            (  20915 bytes, from 2015-05-20 20:03:14)
- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml      (   2849 bytes, from 2015-09-18 12:07:28)
- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml            (  36965 bytes, from 2016-11-26 23:01:08)
- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml             (  27887 bytes, from 2015-10-22 16:34:52)
- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml            (    602 bytes, from 2015-10-22 16:35:02)
- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml         (   1686 bytes, from 2015-05-20 20:03:14)
- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml         (    600 bytes, from 2015-05-20 20:03:07)
- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml           (  41472 bytes, from 2016-01-22 18:18:18)
- /home/robclark/src/freedreno/envytools/rnndb/edp/edp.xml             (  10416 bytes, from 2015-05-20 20:03:14)

Copyright (C) 2013-2015 by the following authors:
- Rob Clark <robdclark@gmail.com> (robclark)
- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin)

Permission is hereby granted, free of charge, to any person obtaining
a copy of this software and associated documentation files (the
"Software"), to deal in the Software without restriction, including
without limitation the rights to use, copy, modify, merge, publish,
distribute, sublicense, and/or sell copies of the Software, and to
permit persons to whom the Software is furnished to do so, subject to
the following conditions:

The above copyright notice and this permission notice (including the
next paragraph) shall be included in all copies or substantial
portions of the Software.

THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*/


enum dsi_traffic_mode {
	NON_BURST_SYNCH_PULSE = 0,
	NON_BURST_SYNCH_EVENT = 1,
	BURST_MODE = 2,
};

enum dsi_vid_dst_format {
	VID_DST_FORMAT_RGB565 = 0,
	VID_DST_FORMAT_RGB666 = 1,
	VID_DST_FORMAT_RGB666_LOOSE = 2,
	VID_DST_FORMAT_RGB888 = 3,
};

enum dsi_rgb_swap {
	SWAP_RGB = 0,
	SWAP_RBG = 1,
	SWAP_BGR = 2,
	SWAP_BRG = 3,
	SWAP_GRB = 4,
	SWAP_GBR = 5,
};

enum dsi_cmd_trigger {
	TRIGGER_NONE = 0,
	TRIGGER_SEOF = 1,
	TRIGGER_TE = 2,
	TRIGGER_SW = 4,
	TRIGGER_SW_SEOF = 5,
	TRIGGER_SW_TE = 6,
};

enum dsi_cmd_dst_format {
	CMD_DST_FORMAT_RGB111 = 0,
	CMD_DST_FORMAT_RGB332 = 3,
	CMD_DST_FORMAT_RGB444 = 4,
	CMD_DST_FORMAT_RGB565 = 6,
	CMD_DST_FORMAT_RGB666 = 7,
	CMD_DST_FORMAT_RGB888 = 8,
};

enum dsi_lane_swap {
	LANE_SWAP_0123 = 0,
	LANE_SWAP_3012 = 1,
	LANE_SWAP_2301 = 2,
	LANE_SWAP_1230 = 3,
	LANE_SWAP_0321 = 4,
	LANE_SWAP_1032 = 5,
	LANE_SWAP_2103 = 6,
	LANE_SWAP_3210 = 7,
};

#define DSI_IRQ_CMD_DMA_DONE					0x00000001
#define DSI_IRQ_MASK_CMD_DMA_DONE				0x00000002
#define DSI_IRQ_CMD_MDP_DONE					0x00000100
#define DSI_IRQ_MASK_CMD_MDP_DONE				0x00000200
#define DSI_IRQ_VIDEO_DONE					0x00010000
#define DSI_IRQ_MASK_VIDEO_DONE					0x00020000
#define DSI_IRQ_BTA_DONE					0x00100000
#define DSI_IRQ_MASK_BTA_DONE					0x00200000
#define DSI_IRQ_ERROR						0x01000000
#define DSI_IRQ_MASK_ERROR					0x02000000
#define REG_DSI_6G_HW_VERSION					0x00000000
#define DSI_6G_HW_VERSION_MAJOR__MASK				0xf0000000
#define DSI_6G_HW_VERSION_MAJOR__SHIFT				28
static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val)
{
	return ((val) << DSI_6G_HW_VERSION_MAJOR__SHIFT) & DSI_6G_HW_VERSION_MAJOR__MASK;
}
#define DSI_6G_HW_VERSION_MINOR__MASK				0x0fff0000
#define DSI_6G_HW_VERSION_MINOR__SHIFT				16
static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val)
{
	return ((val) << DSI_6G_HW_VERSION_MINOR__SHIFT) & DSI_6G_HW_VERSION_MINOR__MASK;
}
#define DSI_6G_HW_VERSION_STEP__MASK				0x0000ffff
#define DSI_6G_HW_VERSION_STEP__SHIFT				0
static inline uint32_t DSI_6G_HW_V