// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2023, Linaro Limited
*/
#include <linux/device.h>
#include <linux/interconnect.h>
#include <linux/interconnect-provider.h>
#include <linux/module.h>
#include <linux/of_platform.h>
#include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
#include "bcm-voter.h"
#include "icc-common.h"
#include "icc-rpmh.h"
#include "sm8650.h"
static struct qcom_icc_node qhm_qspi = {
.name = "qhm_qspi",
.id = SM8650_MASTER_QSPI_0,
.channels = 1,
.buswidth = 4,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node qhm_qup1 = {
.name = "qhm_qup1",
.id = SM8650_MASTER_QUP_1,
.channels = 1,
.buswidth = 4,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node qxm_qup02 = {
.name = "qxm_qup02",
.id = SM8650_MASTER_QUP_3,
.channels = 1,
.buswidth = 8,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node xm_sdc4 = {
.name = "xm_sdc4",
.id = SM8650_MASTER_SDCC_4,
.channels = 1,
.buswidth = 8,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node xm_ufs_mem = {
.name = "xm_ufs_mem",
.id = SM8650_MASTER_UFS_MEM,
.channels = 1,
.buswidth = 16,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node xm_usb3_0 = {
.name = "xm_usb3_0",
.id = SM8650_MASTER_USB3_0,
.channels = 1,
.buswidth = 8,
.num_links = 1,
.links = { SM8650_SLAVE_A1NOC_SNOC },
};
static struct qcom_icc_node qhm_qdss_bam = {
.name = "qhm_qdss_bam",
.id = SM8650_MASTER_QDSS_BAM,
.channels = 1,
.buswidth = 4,
.num_links = 1,
.links = { SM8650_SLAVE_A2NOC_SNOC },
};
static struct qcom_icc_node qhm_qup2 = {
.name = "qhm_qup2",
.id = SM8650_MASTER_QUP_2,
.channels = 1,
.buswidth = 4,
.num_links = 1
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