summaryrefslogtreecommitdiff
path: root/drivers/media/i2c/ccs/ccs-regs.h
blob: 7b5dbc86e4cd18888231f4c21f4bc4c3f47844dd (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */
/* Copyright (C) 2019--2020 Intel Corporation */
/*
 * Generated by Documentation/driver-api/media/drivers/ccs/mk-ccs-regs;
 * do not modify.
 */

#ifndef __CCS_REGS_H__
#define __CCS_REGS_H__

#include <linux/bits.h>

#include <media/v4l2-cci.h>

#define CCS_FL_BASE		CCI_REG_PRIVATE_SHIFT
#define CCS_FL_FLOAT_IREAL	BIT(CCS_FL_BASE)
#define CCS_FL_IREAL		BIT(CCS_FL_BASE + 1)
#define CCS_BUILD_BUG \
	BUILD_BUG_ON(~CCI_REG_PRIVATE_MASK & (BIT(CCS_FL_BASE) | BIT(CCS_FL_BASE + 1)))
#define CCS_R_MODULE_MODEL_ID					CCI_REG16(0x0000)
#define CCS_R_MODULE_REVISION_NUMBER_MAJOR			CCI_REG8(0x0002)
#define CCS_R_FRAME_COUNT					CCI_REG8(0x0005)
#define CCS_R_PIXEL_ORDER					CCI_REG8(0x0006)
#define CCS_PIXEL_ORDER_GRBG					0U
#define CCS_PIXEL_ORDER_RGGB					1U
#define CCS_PIXEL_ORDER_BGGR					2U
#define CCS_PIXEL_ORDER_GBRG					3U
#define CCS_R_MIPI_CCS_VERSION					CCI_REG8(0x0007)
#define CCS_MIPI_CCS_VERSION_V1_0				0x10
#define CCS_MIPI_CCS_VERSION_V1_1				0x11
#define CCS_MIPI_CCS_VERSION_MAJOR_SHIFT			4U
#define CCS_MIPI_CCS_VERSION_MAJOR_MASK				0xf0
#define CCS_MIPI_CCS_VERSION_MINOR_SHIFT			0U
#define CCS_MIPI_CCS_VERSION_MINOR_MASK				0xf
#define CCS_R_DATA_PEDESTAL					CCI_REG16(0x0008)
#define CCS_R_MODULE_MANUFACTURER_ID				CCI_REG16(0x000e)
#define CCS_R_MODULE_REVISION_NUMBER_MINOR			CCI_REG8(0x0010)
#define CCS_R_MODULE_DATE_YEAR					CCI_REG8(0x0012)
#define CCS_R_MODULE_DATE_MONTH					CCI_REG8(0x0013)
#define CCS_R_MODULE_DATE_DAY					CCI_REG8(0x0014)
#define CCS_R_MODULE_DATE_PHASE					CCI_REG8(0x0015)
#define CCS_MODULE_DATE_PHASE_SHIFT				0U
#define CCS_MODULE_DATE_PHASE_MASK				0x7
#define CCS_MODULE_DATE_PHASE_TS				0U
#define CCS_MODULE_DATE_PHASE_ES				1U
#define CCS_MODULE_DATE_PHASE_CS				2U
#define CCS_MODULE_DATE_PHASE_MP				3U
#define CCS_R_SENSOR_MODEL_ID					CCI_REG16(0x0016)
#define CCS_R_SENSOR_REVISION_NUMBER				CCI_REG8(0x0018)
#define CCS_R_SENSOR_FIRMWARE_VERSION				CCI_REG8(0x001a)
#define CCS_R_SERIAL_NUMBER					CCI_REG32(0x001c)
#define CCS_R_SENSOR_MANUFACTURER_ID				CCI_REG16(0x0020)
#define CCS_R_SENSOR_REVISION_NUMBER_16				CCI_REG16(0x0022)
#define CCS_R_FRAME_FORMAT_MODEL_TYPE				CCI_REG8(0x0040)
#define CCS_FRAME_FORMAT_MODEL_TYPE_2_BYTE			1U
#define CCS_FRAME_FORMAT_MODEL_TYPE_4_BYTE			2U
#define CCS_R_FRAME_FORMAT_MODEL_SUBTYPE			CCI_REG8(0x0041)
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_SHIFT		0U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_ROWS_MASK		0xf
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_SHIFT		4U
#define CCS_FRAME_FORMAT_MODEL_SUBTYPE_COLUMNS_MASK		0xf0
#define CCS_R_FRAME_FORMAT_DESCRIPTOR(n)			CCI_REG16(0x0042 + (n) * 2)
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MIN_N			0U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_MAX_N			14U
#define CCS_R_FRAME_FORMAT_DESCRIPTOR_4(n)			CCI_REG32(0x0060 + (n) * 4)
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_SHIFT		0U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PIXELS_MASK			0xfff
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_SHIFT			12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MASK			0xf000
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_EMBEDDED		1U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_DUMMY_PIXEL		2U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_BLACK_PIXEL		3U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_DARK_PIXEL		4U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_VISIBLE_PIXEL		5U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_0	8U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_1	9U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_2	10U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_3	11U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_4	12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_5	13U
#define CCS_FRAME_FORMAT_DESCRIPTOR_PCODE_MANUF_SPECIFIC_6	14U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_4_MIN_N			0U
#define CCS_LIM_FRAME_FORMAT_DESCRIPTOR_4_MAX_N			7U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PIXELS_SHIFT		0U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PIXELS_MASK		0xffff
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_SHIFT		28U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MASK		0xf0000000
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_EMBEDDED		1U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_DUMMY_PIXEL		2U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_BLACK_PIXEL		3U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_DARK_PIXEL		4U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_VISIBLE_PIXEL	5U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_0	8U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_1	9U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_2	10U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_3	11U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_4	12U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_5	13U
#define CCS_FRAME_FORMAT_DESCRIPTOR_4_PCODE_MANUF_SPECIFIC_6	14U
#define CCS_R_ANALOG_GAIN_CAPABILITY				CCI_REG16(0x0080)
#define CCS_ANALOG_GAIN_CAPABILITY_GLOBAL			0U
#define CCS_ANALOG_GAIN_CAPABILITY_ALTERNATE_GLOBAL		2U
#define CCS_R_ANALOG_GAIN_CODE_MIN				CCI_REG16(0x0084)
#define CCS_R_ANALOG_GAIN_CODE_MAX				CCI_REG16(0x0086)
#define CCS_R_ANALOG_GAIN_CODE_STEP				CCI_REG16(0x0088)
#define CCS_R_ANALOG_GAIN_TYPE					CCI_REG16(0x008a)
#define CCS_R_ANALOG_GAIN_M0					CCI_REG16(0x008c)
#define CCS_R_ANALOG_GAIN_C0					CCI_REG16(0x008e)
#define CCS_R_ANALOG_GAIN_M1					CCI_REG16(0x0090)
#define CCS_R_ANALOG_GAIN_C1					CCI_REG16(0x0092)
#define CCS_R_ANALOG_LINEAR_GAIN_MIN				CCI_REG16(0x0094)
#define CCS_R_ANALOG_LINEAR_GAIN_MAX				CCI_REG16(0x0096)
#define CCS_R_ANALOG_LINEAR_GAIN_STEP_SIZE			CCI_REG16(0x0098)
#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MIN			CCI_REG16(0x009a)
#define CCS_R_ANALOG_EXPONENTIAL_GAIN_MAX			CCI_REG16(0x009c)
#define CCS_R_ANALOG_EXPONENTIAL_GAIN_STEP_SIZE			CCI_REG16(0x009e)
#define CCS_R_DATA_FORMAT_MODEL_TYPE				CCI_REG8(0x00c0)
#define CCS_DATA_FORMAT_MODEL_TYPE_NORMAL			1U
#define CCS_DATA_FORMAT_MODEL_TYPE_EXTENDED			2U
#define CCS_R_DATA_FORMAT_MODEL_SUBTYPE				CCI_REG8(0x00c1)
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_ROWS_SHIFT		0U
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_ROWS_MASK			0xf
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_COLUMNS_SHIFT		4U
#define CCS_DATA_FORMAT_MODEL_SUBTYPE_COLUMNS_MASK		0xf0
#define CCS_R_DATA_FORMAT_DESCRIPTOR(n)				CCI_REG16(0x00c2 + (n) * 2)
#define CCS_LIM_DATA_FORMAT_DESCRIPTOR_MIN_N			0U
#define CCS_LIM_DATA_FORMAT_DESCRIPTOR_MAX_N			15U
#define CCS_DATA_FORMAT_DESCRIPTOR_COMPRESSED_SHIFT		0U
#define CCS_DATA_FORMAT_DESCRIPTOR_COMPRESSED_MASK		0xff
#define CCS_DATA_FORMAT_DESCRIPTOR_UNCOMPRESSED_SHIFT		8U
#define CCS_DATA_FORMAT_DESCRIPTOR_UNCOMPRESSED_MASK		0xff00
#define CCS_R_MODE_SELECT					CCI_REG8(0x0100)
#define CCS_MODE_SELECT_SOFTWARE_STANDBY			0U
#define CCS_MODE_SELECT_STREAMING				1U
#define CCS_R_IMAGE_ORIENTATION					CCI_REG8(0x0101)
#define CCS_IMAGE_ORIENTATION_HORIZONTAL_MIRROR			BIT(0)
#define CCS_IMAGE_ORIENTATION_VERTICAL_FLIP			BIT(1)
#define CCS_R_SOFTWARE_RESET					CCI_REG8(0x0103)
#define CCS_SOFTWARE_RESET_OFF					0U
#define CCS_SOFTWARE_RESET_ON					1U
#define CCS_R_GROUPED_PARAMETER_HOLD				CCI_REG8(0x0104)
#define CCS_R_MASK_CORRUPTED_FRAMES				CCI_REG8(0x0105)
#define CCS_MASK_CORRUPTED_FRAMES_ALLOW				0U
#define CCS_MASK_CORRUPTED_FRAMES_MASK				1U
#define CCS_R_FAST_STANDBY_CTRL					CCI_REG8(0x0106)
#define CCS_FAST_STANDBY_CTRL_COMPLETE_FRAMES			0U
#define CCS_FAST_STANDBY_CTRL_FRAME_TRUNCATION			1U
#define CCS_R_CCI_ADDRESS_CTRL					CCI_REG8(0x0107)
#define CCS_R_2ND_CCI_IF_CTRL					CCI_REG8(0x0108)
#define CCS_2ND_CCI_IF_CTRL_ENABLE				BIT(0)
#define CCS_2ND_CCI_IF_CTRL_ACK					BIT(1)
#define CCS_R_2ND_CCI_ADDRESS_CTRL				CCI_REG8(0x0109)
#define CCS_R_CSI_CHANNEL_IDENTIFIER				CCI_REG8(0x0110)
#define CCS_R_CSI_SIGNALING_MODE				CCI_REG8(0x0111)
#define CCS_CSI_SIGNALING_MODE_CSI_2_DPHY			2U
#define CCS_CSI_SIGNALING_MODE_CSI_2_CPHY			3U
#define CCS_R_CSI_DATA_FORMAT					CCI_REG16(0x0112)
#define CCS_R_CSI_LANE_MODE					CCI_REG8(0x0114)
#define CCS_R_DPCM_FRAME_DT					CCI_REG8(0x011d)
#define CCS_R_BOTTOM_EMBEDDED_DATA_DT				CCI_REG8(0x011e)
#define CCS_R_BOTTOM_EMBEDDED_DATA_VC				CCI_REG8(0x011f)
#define CCS_R_GAIN_MODE						CCI_REG8(0x0120)
#define CCS_GAIN_MODE_GLOBAL					0U
#define CCS_GAIN_MODE_ALTERNATE					1U
#define CCS_R_ADC_BIT_DEPTH					CCI_REG8(0x0121)
#define CCS_R_EMB_DATA_CTRL					CCI_REG8(0x0122)
#define CCS_EMB_DATA_CTRL_RAW8_PACKING_FOR_RAW16		BIT(0)
#define CCS_EMB_DATA_CTRL_RAW10_PACKING_FOR_RAW20		BIT(1)
#define CCS_EMB_DATA_CTRL_RAW12_PACKING_FOR_RAW24		BIT(2)
#define CCS_R_GPIO_TRIG_MODE					CCI_REG8(0x0130)
#define CCS_R_EXTCLK_FREQUENCY_MHZ				(CCI_REG16(0x0136) | CCS_FL_IREAL)
#define CCS_R_TEMP_SENSOR_CTRL					CCI_REG8(0x0138)
#define CCS_TEMP_SENSOR_CTRL_ENABLE				BIT(0)
#define CCS_R_TEMP_SENSOR_MODE					CCI_REG8(0x0139)
#define CCS_R_TEMP_SENSOR_OUTPUT				CCI_REG8(0x013a)
#define CCS_R_FINE_INTEGRATION_TIME				CCI_REG16(0x0200)
#define CCS_R_COARSE_INTEGRATION_TIME				CCI_REG16(0x0202)
#define CCS_R_ANALOG_GAIN_CODE_GLOBAL				CCI_REG16(0x0204)
#define CCS_R_ANALOG_LINEAR_GAIN_GLOBAL				CCI_REG16(0x0206)
#define CCS_R_ANALOG_EXPONENTIAL_GAIN_GLOBAL			CCI_REG16(0x0208)
#define CCS_R_DIGITAL_GAIN_GLOBAL				CCI_REG16(0x020e)
#define CCS_R_SHORT_ANALOG_GAIN_GLOBAL				CCI_REG16(0x0216)
#define CCS_R_SHORT_DIGITAL_GAIN_GLOBAL				CCI_REG16(0x0218)
#define CCS_R_HDR_MODE						CCI_REG8(0x0220)
#define CCS_HDR_MODE_ENABLED					BIT(0)
#define CCS_HDR_MODE_SEPARATE_ANALOG_GAIN			BIT(1)
#define CCS_HDR_MODE_UPSCALING					BIT(2)
#define CCS_HDR_MODE_RESET_SYNC					BIT(3)
#define CCS_HDR_MODE_TIMING_MODE				BIT(4)
#define CCS_HDR_MODE_EXPOSURE_CTRL_DIRECT			BIT(5)
#define CCS_HDR_MODE_SEPARATE_DIGITAL_GAIN			BIT(6)
#define CCS_R_HDR_RESOLUTION_REDUCTION				CCI_REG8(0x0221)
#define CCS_HDR_RESOLUTION_REDUCTION_ROW_SHIFT			0U
#define CCS_HDR_RESOLUTION_REDUCTION_ROW_MASK			0xf
#define CCS_HDR_RESOLUTION_REDUCTION_COLUMN_SHIFT		4U
#define CCS_HDR_RESOLUTION_REDUCTION_COLUMN_MASK		0xf0
#define CCS_R_EXPOSURE_RATIO					CCI_REG8(0x0222)
#define CCS_R_HDR_INTERNAL_BIT_DEPTH				CCI_REG8(0x0223)
#define CCS_R_DIRECT_SHORT_INTEGRATION_TIME			CCI_REG16(0x0224)
#define CCS_R_SHORT_ANALOG_LINEAR_GAIN_GLOBAL			CCI_REG16(0x0226)
#define CCS_R_SHORT_ANALOG_EXPONENTIAL_GAIN_GLOBAL		CCI_REG16(0x0228)
#define CCS_R_VT_PIX_CLK_DIV					CCI_REG16(0x0300)
#define CCS_R_VT_SYS_CLK_DIV					CCI_REG16(0x0302)
#define CCS_R_PRE_PLL_CLK_DIV					CCI_REG16(0x0304)
#define CCS_R_PLL_MULTIPLIER					CCI_REG16(0x0306)
#define CCS_R_OP_PIX_CLK_DIV					CCI_REG16(0x0308)
#define CCS_R_OP_SYS_CLK_DIV					CCI_REG16(0x030a)
#define CCS_R_OP_PRE_PLL_CLK_DIV				CCI_REG16(0x030c)
#define CCS_R_OP_PLL_MULTIPLIER					CCI_REG16(0x030e)
#define CCS_R_PLL_MODE						CCI_REG8(0x0310)
#define CCS_PLL_MODE_SHIFT					0U
#define CCS_PLL_MODE_MASK					0x1
#define CCS_PLL_MODE_SINGLE					0U
#define CCS_PLL_MODE_DUAL					1U
#define CCS_R_OP_PIX_CLK_DIV_REV				CCI_REG16(0x0312)
#define CCS_R_OP_SYS_CLK_DIV_REV				CCI_REG16(0x0314)
#define CCS_R_FRAME_LENGTH_LINES				CCI_REG16(0x0340)
#define CCS_R_LINE_LENGTH_PCK					CCI_REG16(0x0342)
#define CCS_R_X_ADDR_START					CCI_REG16(0x0344)
#define CCS_R_Y_ADDR_START					CCI_REG16(0x0346)
#define CCS_R_X_ADDR_END					CCI_REG16(0x0348)
#define CCS_R_Y_ADDR_END					CCI_REG16(0x034a)
#define CCS_R_X_OUTPUT_SIZE					CCI_REG16(0x034c)
#define CCS_R_Y_OUTPUT_SIZE					CCI_REG16(0x034e)
#define CCS_R_FRAME_LENGTH_CTRL					CCI_REG8(0x0350)
#define CCS_FRAME_LENGTH_CTRL_AUTOMATIC				BIT(0)
#define CCS_R_TIMING_MODE_CTRL					CCI_REG8(0x0352)
#define CCS_TIMING_MODE_CTRL_MANUAL_READOUT			BIT(0)
#define CCS_TIMING_MODE_CTRL_DELAYED_EXPOSURE			BIT(1)
#define CCS_R_START_READOUT_RS					CCI_REG8(0x0353)
#define CCS_START_READOUT_RS_MANUAL_READOUT_START		BIT(0)
#define CCS_R_FRAME_MARGIN					CCI_REG16(0x0354)
#define CCS_R_X_EVEN_INC					CCI_REG16(0x0380)
#define CCS_R_X_ODD_INC						CCI_REG16(0x0382)
#define CCS_R_Y_EVEN_INC					CCI_REG16(0x0384)
#define CCS_R_Y_ODD_INC						CCI_REG16(0x0386)
#define CCS_R_MONOCHROME_EN					CCI_REG8(0x0390)
#define CCS_MONOCHROME_EN_ENABLED				0U
#define CCS_R_SCALING_MODE					CCI_REG16(0x0400)
#define CCS_SCALING_MODE_NO_SCALING				0U
#define CCS_SCALING_MODE_HORIZONTAL				1U
#define CCS_R_SCALE_M						CCI_REG16(0x0404)
#define CCS_R_SCALE_N						CCI_REG16(0x0406)
#define CCS_R_DIGITAL_CROP_X_OFFSET				CCI_REG16(0x0408)
#define CCS_R_DIGITAL_CROP_Y_OFFSET				CCI_REG16(0x040a)
#define CCS_R_DIGITAL_CROP_IMAGE_WIDTH				CCI_REG16(0x040c)
#define CCS_R_DIGITAL_CROP_IMAGE_HEIGHT				CCI_REG16(0x040e)
#define CCS_R_COMPRESSION_MODE					CCI_REG16(0x0500)
#define CCS_COMPRESSION_MODE_NONE				0U
#define CCS_COMPRESSION_MODE_DPCM_PCM_SIMPLE			1U
#define CCS_R_TEST_PATTERN_MODE					CCI_REG16(0x0600)
#define CCS_TEST_PATTERN_MODE_NONE				0U
#define CCS_TEST_PATTERN_MODE_SOLID_COLOR			1U
#define CCS_TEST_PATTERN_MODE_COLOR_BARS			2U
#define CCS_TEST_PATTERN_MODE_FADE_TO_GREY			3U
#define CCS_TEST_PATTERN_MODE_PN9				4U
#define CCS_TEST_PATTERN_MODE_COLOR_TILE			5U
#define CCS_R_TEST_DATA_RED					CCI_REG16(0x0602)
#define CCS_R_TEST_DATA_GREENR					CCI_REG16(0x0604)
#define CCS_R_TEST_DATA_BLUE					CCI_REG16(0x0606)
#define CCS_R_TEST_DATA_GREENB					CCI_REG16(0x0608)
#define CCS_R_VALUE_STEP_SIZE_SMOOTH				CCI_REG8(0x060a)
#define CCS_R_VALUE_STEP_SIZE_QUANTISED				CCI_REG8(0x060b)
#define CCS_R_TCLK_POST						CCI_REG8(0x0800)
#define CCS_R_THS_PREPARE					CCI_REG8(0x0801)
#define CCS_R_THS_ZERO_MIN					CCI_REG8(0x0802)
#define CCS_R_THS_TRAIL						CCI_REG8(0x0803)
#define CCS_R_TCLK_TRAIL_MIN					CCI_REG8(0x0804)
#define CCS_R_TCLK_PREPARE					CCI_REG8(0x0805)
#define CCS_R_TCLK_ZERO						CCI_REG8(0x0806)
#define CCS_R_TLPX						CCI_REG8(0x0807)
#define CCS_R_PHY_CTRL						CCI_REG8(0x0808)
#define CCS_PHY_CTRL_AUTO					0U
#define CCS_PHY_CTRL_UI						1U
#define CCS_PHY_CTRL_MANUAL					2U
#define CCS_R_TCLK_POST_EX					CCI_REG16(0x080a)
#define CCS_R_THS_PREPARE_EX					CCI_REG16(0x080c)
#define CCS_R_THS_ZERO_MIN_EX					CCI_REG16(0x080e)
#define CCS_R_THS_TRAIL_EX					CCI_REG16(0x0810)
#define CCS_R_TCLK_TRAIL_MIN_EX					CCI_REG16(0x0812)
#define CCS_R_TCLK_PREPARE_EX					CCI_REG16(0x0814)
#define CCS_R_TCLK_ZERO_EX					CCI_REG16(0x0816)
#define CCS_R_TLPX_EX						CCI_REG16(0x0818)
#define CCS_R_REQUESTED_LINK_RATE				CCI_REG32(0x0820)
#define CCS_R_DPHY_EQUALIZATION_MODE				CCI_REG8(0x0824)
#define CCS_DPHY_EQUALIZATION_MODE_EQ2				BIT(0)
#define CCS_R_PHY_EQUALIZATION_CTRL				CCI_REG8(0x0825)
#define CCS_PHY_EQUALIZATION_CTRL_ENABLE			BIT(0)
#define CCS_R_DPHY_PREAMBLE_CTRL				CCI_REG8(0x0826)
#define CCS_DPHY_PREAMBLE_CTRL_ENABLE				BIT(0)
#define CCS_R_DPHY_PREAMBLE_LENGTH				CCI_REG8(0x0826)
#define CCS_R_PHY_SSC_CTRL					CCI_REG8(0x0828)
#define CCS_PHY_SSC_CTRL_ENABLE					BIT(0)
#define CCS_R_MANUAL_LP_CTRL					CCI_REG8(0x0829)
#define CCS_MANUAL_LP_CTRL_ENABLE				BIT(0)
#define CCS_R_TWAKEUP						CCI_REG8(0x082a)
#define CCS_R_TINIT						CCI_REG8(0x082b)
#define CCS_R_THS_EXIT						CCI_REG8(0x082c)
#define CCS_R_THS_EXIT_EX					CCI_REG16(0x082e)
#define CCS_R_PHY_PERIODIC_CALIBRATION_CTRL			CCI_REG8(0x0830)
#define CCS_PHY_PERIODIC_CALIBRATION_CTRL_FRAME_BLANKING	BIT(0)
#define CCS_R_PHY_PERIODIC_CALIBRATION_INTERVAL			CCI_REG8(0x0831)
#define CCS_R_PHY_INIT_CALIBRATION_CTRL				CCI_REG8(0x0832)
#define CCS_PHY_INIT_CALIBRATION_CTRL_STREAM_START		BIT(0)
#define CCS_R_DPHY_CALIBRATION_MODE				CCI_REG8(0x0833)
#define CCS_DPHY_CALIBRATION_MODE_ALSO_ALTERNATE		BIT(0)
#define CCS_R_CPHY_CALIBRATION_MODE				CCI_REG8(0x0834)
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_1			0U
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_2			1U
#define CCS_CPHY_CALIBRATION_MODE_FORMAT_3			2U
#define CCS_R_T3_CALPREAMBLE_LENGTH				CCI_REG8(0x0835)
#define CCS_R_T3_CALPREAMBLE_LENGTH_PER				CCI_REG8(0x0836)
#define CCS_R_T3_CALALTSEQ_LENGTH				CCI_REG8(0x0837)
#define CCS_R_T3_CALALTSEQ_LENGTH_PER				CCI_REG8(0x0838)
#define CCS_R_FM2_INIT_SEED					CCI_REG16(0x083a)
#define CCS_R_T3_CALUDEFSEQ_LENGTH				CCI_REG16(0x083c)
#define CCS_R_T3_CALUDEFSEQ_LENGTH_PER				CCI_REG16(0x083e)
#define CCS_R_TGR_PREAMBLE_LENGTH				CCI_REG8(0x0841)
#define CCS_TGR_PREAMBLE_LENGTH_PREAMABLE_PROG_SEQ		BIT(7)
#define CCS_TGR_PREAMBLE_LENGTH_BEGIN_PREAMBLE_LENGTH_SHIFT	0U
#define CCS_TGR_PREAMBLE_LENGTH_BEGIN_PREAMBLE_LENGTH_MASK	0x3f
#define CCS_R_TGR_POST_LENGTH					CCI_REG8(0x0842)
#define CCS_TGR_POST_LENGTH_POST_LENGTH_SHIFT			0U
#define CCS_TGR_POST_LENGTH_POST_LENGTH_MASK			0x1f
#define CCS_R_TGR_PREAMBLE_PROG_SEQUENCE(n2)			CCI_REG8(0x0843 + (n2))
#define CCS_LIM_TGR_PREAMBLE_PROG