path: root/drivers/media/i2c/ov9734.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 Intel Corporation.

#include <linux/unaligned.h>
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/pm_runtime.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fwnode.h>

#define OV9734_LINK_FREQ_180MHZ		180000000ULL
#define OV9734_SCLK			36000000LL
#define OV9734_MCLK			19200000
/* ov9734 only support 1-lane mipi output */
#define OV9734_DATA_LANES		1
#define OV9734_RGB_DEPTH		10

#define OV9734_REG_CHIP_ID		0x300a
#define OV9734_CHIP_ID			0x9734

#define OV9734_REG_MODE_SELECT		0x0100
#define OV9734_MODE_STANDBY		0x00
#define OV9734_MODE_STREAMING		0x01

/* vertical-timings from sensor */
#define OV9734_REG_VTS			0x380e
#define OV9734_VTS_30FPS		0x0322
#define OV9734_VTS_30FPS_MIN		0x0322
#define OV9734_VTS_MAX			0x7fff

/* horizontal-timings from sensor */
#define OV9734_REG_HTS			0x380c

/* Exposure controls from sensor */
#define OV9734_REG_EXPOSURE		0x3500
#define OV9734_EXPOSURE_MIN		4
#define OV9734_EXPOSURE_MAX_MARGIN	4
#define	OV9734_EXPOSURE_STEP		1

/* Analog gain controls from sensor */
#define OV9734_REG_ANALOG_GAIN		0x350a
#define OV9734_ANAL_GAIN_MIN		16
#define OV9734_ANAL_GAIN_MAX		248
#define OV9734_ANAL_GAIN_STEP		1

/* Digital gain controls from sensor */
#define OV9734_REG_MWB_R_GAIN		0x5180
#define OV9734_REG_MWB_G_GAIN		0x5182
#define OV9734_REG_MWB_B_GAIN		0x5184
#define OV9734_DGTL_GAIN_MIN		256
#define OV9734_DGTL_GAIN_MAX		1023
#define OV9734_DGTL_GAIN_STEP		1
#define OV9734_DGTL_GAIN_DEFAULT	256

/* Test Pattern Control */
#define OV9734_REG_TEST_PATTERN		0x5080
#define OV9734_TEST_PATTERN_ENABLE	BIT(7)
#define OV9734_TEST_PATTERN_BAR_SHIFT	2

/* Group Access */
#define OV9734_REG_GROUP_ACCESS		0x3208
#define OV9734_GROUP_HOLD_START		0x0
#define OV9734_GROUP_HOLD_END		0x10
#define OV9734_GROUP_HOLD_LAUNCH	0xa0

enum {
	OV9734_LINK_FREQ_180MHZ_INDEX,
};

struct ov9734_reg {
	u16 address;
	u8 val;
};

struct ov9734_reg_list {
	u32 num_of_regs;
	const struct ov9734_reg *regs;
};

struct ov9734_link_freq_config {
	const struct ov9734_reg_list reg_list;
};

struct ov9734_mode {
	/* Frame width in pixels */
	u32 width;

	/* Frame height in pixels */
	u32 height;

	/* Horizontal timining size */
	u32 hts;

	/* Default vertical timining size */
	u32 vts_def;

	/* Min vertical timining size */
	u32 vts_min;

	/* Link frequency needed for this resolution */
	u32 link_freq_index;

	/* Sensor register settings for this resolution */
	const struct ov9734_reg_list reg_list;
};

static const struct ov9734_reg mipi_data_rate_360mbps[] = {
	{0x3030, 0x19},
	{0x3080, 0x02},
	{0x3081, 0x4b},
	{0x3082, 0x04},
	{0x3083, 0x00},
	{0x3084, 0x02},
	{0x3085, 0x01},
	{0x3086, 0x01},
	{0x3089, 0x01},
	{0x308a, 0x00},
	{0x301e, 0x15},
	{0x3103, 0x01},
};

static const struct ov9734_reg mode_1296x734_regs[] = {
	{0x3001, 0x00},
	{0x3002, 0x00},
	{0x3007, 0x00},
	{0x3010, 0x00},
	{0x3011, 0x08},
	{0x3014, 0x22},
	{0x3600, 0x55},
	{0x3601, 0x02},
	{0x3605, 0x22},
	{0x3611, 0xe7},
	{0x3654, 0x10},
	{0x3655, 0x77},
	{0x3656, 0x77},
	{0x3657, 0x07},
	{0x3658, 0x22},
	{0x3659, 0x22},
	{0x365a, 0x02},
	{0x3784, 0x05},
	{0x3785, 0x55},
	{0x37c0, 0x07},
	{0x3800, 0x00},
	{0x3801, 0x04},
	{0x3802, 0x00},
	{0x3803, 0x04},
	{0x3804, 0x05},
	{0x3805, 0x0b},
	{0x3806, 0x02},
	{0x3807, 0xdb},
	{0x3808, 0x05},
	{0x3809, 0x00},
	{0x380a, 0x02},
	{0x380b, 0xd0},
	{0x380c, 0x05},
	{0x380d, 0xc6},
	{0x380e, 0x03},
	{0x380f, 0x22},
	{0x3810, 0x00},
	{0x3811, 0x04},
	{0x3812, 0x00},
	{0x3813, 0x04},
	{0x3816, 0x00},
	{0x3817, 0x00},
	{0x3818, 0x00},
	{0x3819, 0x04},
	{0x3820, 0x18},
	{0x3821, 0x00},
	{0x382c, 0x06},
	{0x3500, 0x00},
	{0x3501, 0x31},
	{0x3502, 0x00},
	{0x3503, 0x03},
	{0x3504, 0x00},
	{0x3505, 0x00},
	{0x3509, 0x10},
	{0x350a, 0x00},
	{0x350b, 0x40},
	{0x3d00, 0x00},
	{0x3d01, 0x00},
	{0x3d02, 0x00},
	{0x3d03, 0x00},
	{0x3d04, 0x00},
	{0x3d05, 0x00},
	{0x3d06, 0x00},
	{0x3d07, 0x00},
	{0x3d08, 0x00},
	{0x3d09, 0x00},
	{0x3d0a, 0x00},
	{0x3d0b, 0x00},
	{0x3d0c, 0x00},
	{0x3d0d, 0x00},
	{0x3d0e, 0x00},
	{0x3d0f, 0x00},
	{0x3d80, 0x00},
	{0x3d81, 0x00},
	{0x3d82, 0x38},
	{0x3d83, 0xa4},
	{0x3d84, 0x00},
	{0x3d85, 0x00},
	{0x3d86, 0x1f},
	{0x3d87, 0x03},
	{0x3d8b, 0x00},
	{0x3d8f, 0x00},
	{0x4001, 0xe0},
	{0x4009, 0x0b},
	{0x4300, 0x03},
	{0x4301, 0xff},
	{0x4304, 0x00},
	{0x4305, 0x00},
	{0x4309, 0x00},
	{0x4600, 0x00},
	{0x4601, 0x80},
	{0x4800, 0x00},
	{0x4805, 0x00},
	{0x4821, 0x50},
	{0x4823, 0x50},
	{0x4837, 0x2d},
	{0x4a00, 0x00},
	{0x4f00, 0x80},
	{0x4f01, 0x10},
	{0x4f02, 0x00},
	{0x4f03, 0x00},
	{0x4f04, 0x00},
	{0x4f05, 0x00},
	{0x4f06, 0x00},
	{0x4f07, 0x00},
	{0x4f08, 0x00},
	{0x4f09, 0x00},
	{0x5000, 0x2f},
	{0x500c, 0x00},
	{0x500d, 0x00},
	{0x500e, 0x00},
	{0x500f, 0x00},
	{0x5010, 0x00},
	{0x5011