// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Driver for Samsung S5K6AAFX SXGA 1/6" 1.3M CMOS Image Sensor
* with embedded SoC ISP.
*
* Copyright (C) 2011, Samsung Electronics Co., Ltd.
* Sylwester Nawrocki <s.nawrocki@samsung.com>
*
* Based on a driver authored by Dongsoo Nathaniel Kim.
* Copyright (C) 2009, Dongsoo Nathaniel Kim <dongsoo45.kim@samsung.com>
*/
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/i2c.h>
#include <linux/media.h>
#include <linux/module.h>
#include <linux/regulator/consumer.h>
#include <linux/slab.h>
#include <media/media-entity.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-subdev.h>
#include <media/v4l2-mediabus.h>
#include <media/i2c/s5k6aa.h>
static int debug;
module_param(debug, int, 0644);
#define DRIVER_NAME "S5K6AA"
/* The token to indicate array termination */
#define S5K6AA_TERM 0xffff
#define S5K6AA_OUT_WIDTH_DEF 640
#define S5K6AA_OUT_HEIGHT_DEF 480
#define S5K6AA_WIN_WIDTH_MAX 1280
#define S5K6AA_WIN_HEIGHT_MAX 1024
#define S5K6AA_WIN_WIDTH_MIN 8
#define S5K6AA_WIN_HEIGHT_MIN 8
/*
* H/W register Interface (0xD0000000 - 0xD0000FFF)
*/
#define AHB_MSB_ADDR_PTR 0xfcfc
#define GEN_REG_OFFSH 0xd000
#define REG_CMDWR_ADDRH 0x0028
#define REG_CMDWR_ADDRL 0x002a
#define REG_CMDRD_ADDRH 0x002c
#define REG_CMDRD_ADDRL 0x002e
#define REG_CMDBUF0_ADDR 0x0f12
#define REG_CMDBUF1_ADDR 0x0f10
/*
* Host S/W Register interface (0x70000000 - 0x70002000)
* The value of the two most significant address bytes is 0x7000,
* (HOST_SWIF_OFFS_H). The register addresses below specify 2 LSBs.
*/
#define HOST_SWIF_OFFSH 0x7000
/* Initialization parameters */
/* Master clock frequency in KHz */
#define REG_I_INCLK_FREQ_L 0x01b8
#define REG_I_INCLK_FREQ_H 0x01ba
#define MIN_MCLK_FREQ_KHZ 6000U
#define MAX_MCLK_FREQ_KHZ 27000U
#define REG_I_USE_NPVI_CLOCKS 0x01c6
#define REG_I_USE_NMIPI_CLOCKS 0x01c8
/* Clock configurations, n = 0..2. REG_I_* frequency unit is 4 kHz. */
#define REG_I_OPCLK_4KHZ(n) ((n) * 6 + 0x01cc)
#define REG_I_MIN_OUTRATE_4KHZ(n) ((n) * 6 + 0x01ce)
#define REG_I_MAX_OUTRATE_4KHZ(n) ((n) * 6 + 0x01d0)
#define SYS_PLL_OUT_FREQ (48000000 / 4000)
#define PCLK_FREQ_MIN (24000000 / 4000)
#define PCLK_FREQ_MAX (48000000 / 4000)
#define REG_I_INIT_PARAMS_UPDATED 0x01e0
#define REG_I_ERROR_INFO 0x01e2
/* General purpose parameters */
#define REG_USER_BRIGHTNESS 0x01e4
#define REG_USER_CONTRAST 0x01e6
#define REG_USER_SATURATION 0x01e8
#define REG_USER_SHARPBLUR 0x01ea
#define REG_G_SPEC_EFFECTS 0x01ee
#define REG_G_ENABLE_PREV 0x01f0
#define REG_G_ENABLE_PREV_CHG 0x01f2
#define REG_G_NEW_CFG_SYNC 0x01f8
#define REG_G_PREVZOOM_IN_WIDTH 0x020a
#define REG_G_PREVZOOM_IN_HEIGHT 0x020c
#define REG_G_PREVZOOM_IN_XOFFS 0x020e
#define REG_G_PREVZOOM_IN_YOFFS 0x0210
#define REG_G_INPUTS_CHANGE_REQ 0x021a
#define REG_G_ACTIVE_PREV_CFG 0x021
| 