path: root/drivers/memory/tegra/tegra186.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2017 NVIDIA CORPORATION.  All rights reserved.
 */

#include <linux/io.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>

#if defined(CONFIG_ARCH_TEGRA_186_SOC)
#include <dt-bindings/memory/tegra186-mc.h>
#endif

#if defined(CONFIG_ARCH_TEGRA_194_SOC)
#include <dt-bindings/memory/tegra194-mc.h>
#endif

struct tegra186_mc_client {
	const char *name;
	unsigned int sid;
	struct {
		unsigned int override;
		unsigned int security;
	} regs;
};

struct tegra186_mc_soc {
	const struct tegra186_mc_client *clients;
	unsigned int num_clients;
};

struct tegra186_mc {
	struct device *dev;
	void __iomem *regs;

	const struct tegra186_mc_soc *soc;
};

static void tegra186_mc_program_sid(struct tegra186_mc *mc)
{
	unsigned int i;

	for (i = 0; i < mc->soc->num_clients; i++) {
		const struct tegra186_mc_client *client = &mc->soc->clients[i];
		u32 override, security;

		override = readl(mc->regs + client->regs.override);
		security = readl(mc->regs + client->regs.security);

		dev_dbg(mc->dev, "client %s: override: %x security: %x\n",
			client->name, override, security);

		dev_dbg(mc->dev, "setting SID %u for %s\n", client->sid,
			client->name);
		writel(client->sid, mc->regs + client->regs.override);

		override = readl(mc->regs + client->regs.override);
		security = readl(mc->regs + client->regs.security);

		dev_dbg(mc->dev, "client %s: override: %x security: %x\n",
			client->name, override, security);
	}
}

#if defined(CONFIG_ARCH_TEGRA_186_SOC)
static const struct tegra186_mc_client tegra186_mc_clients[] = {
	{
		.name = "ptcr",
		.sid = TEGRA186_SID_PASSTHROUGH,
		.regs = {
			.override = 0x000,
			.security = 0x004,
		},
	}, {
		.name = "afir",
		.sid = TEGRA186_SID_AFI,
		.regs = {
			.override = 0x070,
			.security = 0x074,
		},
	}, {
		.name = "hdar",
		.sid = TEGRA186_SID_HDA,
		.regs = {
			.override = 0x0a8,
			.security = 0x0ac,
		},
	}, {
		.name = "host1xdmar",
		.sid = TEGRA186_SID_HOST1X,
		.regs = {
			.override = 0x0b0,
			.security = 0x0b4,
		},
	}, {
		.name = "nvencsrd",
		.sid = TEGRA186_SID_NVENC,
		.regs = {
			.override = 0x0e0,
			.security = 0x0e4,
		},
	}, {
		.name = "satar",
		.sid = TEGRA186_SID_SATA,
		.regs = {
			.override = 0x0f8,
			.security = 0x0fc,
		},
	}, {
		.name = "mpcorer",
		.sid = TEGRA186_SID_PASSTHROUGH,
		.regs = {
			.override = 0x138,
			.security = 0x13c,
		},
	}, {
		.name = "nvencswr",
		.sid = TEGRA186_SID_NVENC,
		.regs = {
			.override = 0x158,
			.security = 0x15c,
		},
	}, {
		.name = "afiw",
		.sid = TEGRA186_SID_AFI,
		.regs = {
			.override = 0x188,
			.security = 0x18c,
		},
	}, {
		.name = "hdaw",
		.sid = TEGRA186_SID_HDA,
		.regs = {
			.override = 0x1a8,
			.security = 0x1ac,
		},
	}, {
		.name = "mpcorew",
		.sid = TEGRA186_SID_PASSTHROUGH,
		.regs = {
			.override = 0x1c8,
			.security = 0x1cc,
		},
	}, {
		.name = "sataw",
		.sid = TEGRA186_SID_SATA,
		.regs = {
			.override = 0x1e8,
			.security = 0x1ec,
		},
	}, {
		.name = "ispra",
		.sid = TEGRA186_SID_ISP,
		.regs = {
			.override = 0x220,
			.security = 0x224,
		},
	}, {
		.name = "ispwa",
		.sid = TEGRA186_SID_ISP,
		.regs = {
			.override = 0x230,
			.security = 0x234,
		},
	}, {
		.name = "ispwb",
		.sid = TEGRA186_SID_ISP,
		.regs = {
			.override = 0x238,
			.security = 0x23c,
		},
	}, {
		.name = "xusb_hostr",
		.sid = TEGRA186_SID_XUSB_HOST,
		.regs = {
			.override = 0x250,
			.security = 0x254,
		},
	}, {
		.name = "xusb_hostw",
		.sid = TEGRA186_SID_XUSB_HOST,
		.regs = {
			.override = 0x258,
			.security = 0x25c,
		},
	}, {
		.name = "xusb_devr",
		.sid = TEGRA186_SID_XUSB_DEV,
		.regs = {
			.override = 0x260,
			.security = 0x264,
		},
	}, {
		.name = "xusb_devw",
		.sid = TEGRA186_SID_XUSB_DEV,
		.regs = {
			.override = 0x268,
			.security = 0x26c,
		},
	}, {
		.name = "tsecsrd",
		.sid = TEGRA186_SID_TSEC,
		.regs = {
			.override = 0x2a0,
			.security = 0x2a4,
		},
	}, {
		.name = "tsecswr",
		.sid = TEGRA186_SID_TSEC,
		.regs = {
			.override = 0x2a8,
			.security = 0x2ac,
		},
	}, {
		.name = "gpusrd",
		.sid = TEGRA186_SID_GPU,
		.regs = {
			.override = 0x2