// SPDX-License-Identifier: GPL-2.0
/*
* Arasan NAND Flash Controller Driver
*
* Copyright (C) 2014 - 2020 Xilinx, Inc.
* Author:
* Miquel Raynal <miquel.raynal@bootlin.com>
* Original work (fully rewritten):
* Punnaiah Choudary Kalluri <punnaia@xilinx.com>
* Naga Sureshkumar Relli <nagasure@xilinx.com>
*/
#include <linux/bch.h>
#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/dma-mapping.h>
#include <linux/gpio/consumer.h>
#include <linux/interrupt.h>
#include <linux/iopoll.h>
#include <linux/module.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/rawnand.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#define PKT_REG 0x00
#define PKT_SIZE(x) FIELD_PREP(GENMASK(10, 0), (x))
#define PKT_STEPS(x) FIELD_PREP(GENMASK(23, 12), (x))
#define MEM_ADDR1_REG 0x04
#define MEM_ADDR2_REG 0x08
#define ADDR2_STRENGTH(x) FIELD_PREP(GENMASK(27, 25), (x))
#define ADDR2_CS(x) FIELD_PREP(GENMASK(31, 30), (x))
#define CMD_REG 0x0C
#define CMD_1(x) FIELD_PREP(GENMASK(7, 0), (x))
#define CMD_2(x) FIELD_PREP(GENMASK(15, 8), (x))
#define CMD_PAGE_SIZE(x) FIELD_PREP(GENMASK(25, 23), (x))
#define CMD_DMA_ENABLE BIT(27)
#define CMD_NADDRS(x) FIELD_PREP(GENMASK(30, 28), (x))
#define CMD_ECC_ENABLE BIT(31)
#define PROG_REG 0x10
#define PROG_PGRD BIT(0)
#define PROG_ERASE BIT(2)
#define PROG_STATUS BIT(3)
#define PROG_PGPROG BIT(4)
#define PROG_RDID BIT(6)
