// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Broadcom Starfighter 2 DSA switch driver
*
* Copyright (C) 2014, Broadcom Corporation
*/
#include <linux/list.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
#include <linux/phy_fixed.h>
#include <linux/phylink.h>
#include <linux/mii.h>
#include <linux/clk.h>
#include <linux/of.h>
#include <linux/of_irq.h>
#include <linux/of_address.h>
#include <linux/of_net.h>
#include <linux/of_mdio.h>
#include <net/dsa.h>
#include <linux/ethtool.h>
#include <linux/if_bridge.h>
#include <linux/brcmphy.h>
#include <linux/etherdevice.h>
#include <linux/platform_data/b53.h>
#include "bcm_sf2.h"
#include "bcm_sf2_regs.h"
#include "b53/b53_priv.h"
#include "b53/b53_regs.h"
static u16 bcm_sf2_reg_rgmii_cntrl(struct bcm_sf2_priv *priv, int port)
{
switch (priv->type) {
case BCM4908_DEVICE_ID:
switch (port) {
case 7:
return REG_RGMII_11_CNTRL;
default:
break;
}
break;
default:
switch (port) {
case 0:
return REG_RGMII_0_CNTRL;
case 1:
return REG_RGMII_1_CNTRL;
case 2:
return REG_RGMII_2_CNTRL;
default:
break;
}
}
WARN_ONCE(1, "Unsupported port %d\n", port);
/* RO fallback reg */
return REG_SWITCH_STATUS;
}
static u16 bcm_sf2_reg_led_base(struct bcm_sf2_priv *priv, int port)
{
switch (port) {
case 0:
return REG_LED_0_CNTRL;
case 1:
return REG_LED_1_CNTRL;
case 2:
return REG_LED_2_CNTRL;
}
switch (priv->type) {
case BCM4908_DEVICE_ID:
switch (port) {
case 3:
return REG_LED_3_CNTRL;
case 7:
return REG_LED_4_CNTRL;
default:
break;
}
break;
default:
break;
}
WARN_ONCE(1, "Unsupported port %d\n", port);
/* RO fallback reg */
return REG_SWITCH_STATUS;
}
static u32 bcm_sf2_port_override_offset(struct bcm_sf2_priv *priv, int port)
{
switch (priv->type) {
case BCM4908_DEVICE_ID:
case BCM7445_DEVICE_ID:
return port == 8 ? CORE_STS_OVERRIDE_IMP :
CORE_STS_OVERRIDE_GMIIP_PORT(port);
case BCM7278_DEVICE_ID:
return port == 8 ? CORE_STS_OVERRIDE_IMP2 :
CORE_STS_OVERRIDE_GMIIP2_PORT(port);
default:
WARN_ONCE(1, "Unsupported device: %d\n", priv->type);
}
/* RO fallback register */
return REG_SWITCH_STATUS;
}
/* Return the number of active ports, not counting the IMP (CPU) port */
static unsigned int bcm_sf2_num_active_ports(struct dsa_switch *ds)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
unsigned int port, count = 0;
for (port = 0; port < ds->num_ports; port++) {
if (dsa_is_cpu_port(ds, port))
continue;
if (priv->port_sts[port].enabled)
count++;
}
return count;
}
static void bcm_sf2_recalc_clock(struct dsa_switch *ds)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
unsigned long new_rate;
unsigned int ports_active;
/* Frequenty in Mhz */
static const unsigned long rate_table[] = {
59220000,
60820000,
62500000,
62500000,
};
ports_active = bcm_sf2_num_active_ports(ds);
if (ports_active == 0 || !priv->clk_mdiv)
return;
/* If we overflow our table, just use the recommended operational
* frequency
*/
if (ports_active > ARRAY_SIZE(rate_table))
new_rate = 90000000;
else
new_rate = rate_table[ports_active - 1];
clk_set_rate(priv->clk_mdiv, new_rate);
}
static void bcm_sf2_imp_setup(struct dsa_switch *ds, int port)
{
struct bcm_sf2_priv *priv = bcm_sf2_to_priv(ds);
unsigned int i;
u32 reg;
/* Enable the port memories */
reg = core_readl(priv, CORE_MEM_PSM_VDD_CTRL);
reg &= ~P_TXQ_PSM_VDD(port);
core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
/* Enable forwarding */
core_writel(priv, SW_FWDG_EN, CORE_SWMODE);
/* Enable IMP port in dumb mode */
reg = core_readl(priv, CORE_SWITCH_CTRL);
reg |= MII_DUMB_FWDG_EN;
core_writel(priv, reg, CORE_SWITCH_CTRL);
/* Configure Traffic Class to QoS mapping, al
|