path: root/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c

// SPDX-License-Identifier: GPL-2.0+
/* Microchip Sparx5 Switch driver
 *
 * Copyright (c) 2021 Microchip Technology Inc. and its subsidiaries.
 */

#include <linux/ethtool.h>

#include "sparx5_main_regs.h"
#include "sparx5_main.h"
#include "sparx5_port.h"

/* Index of ANA_AC port counters */
#define SPX5_PORT_POLICER_DROPS 0

/* Add a potentially wrapping 32 bit value to a 64 bit counter */
static void sparx5_update_counter(u64 *cnt, u32 val)
{
	if (val < (*cnt & U32_MAX))
		*cnt += (u64)1 << 32; /* value has wrapped */
	*cnt = (*cnt & ~(u64)U32_MAX) + val;
}

enum sparx5_stats_entry {
	spx5_stats_rx_symbol_err_cnt = 0,
	spx5_stats_pmac_rx_symbol_err_cnt = 1,
	spx5_stats_tx_uc_cnt = 2,
	spx5_stats_pmac_tx_uc_cnt = 3,
	spx5_stats_tx_mc_cnt = 4,
	spx5_stats_tx_bc_cnt = 5,
	spx5_stats_tx_backoff1_cnt = 6,
	spx5_stats_tx_multi_coll_cnt = 7,
	spx5_stats_rx_uc_cnt = 8,
	spx5_stats_pmac_rx_uc_cnt = 9,
	spx5_stats_rx_mc_cnt = 10,
	spx5_stats_rx_bc_cnt = 11,
	spx5_stats_rx_crc_err_cnt = 12,
	spx5_stats_pmac_rx_crc_err_cnt = 13,
	spx5_stats_rx_alignment_lost_cnt = 14,
	spx5_stats_pmac_rx_alignment_lost_cnt = 15,
	spx5_stats_tx_ok_bytes_cnt = 16,
	spx5_stats_pmac_tx_ok_bytes_cnt = 17,
	spx5_stats_tx_defer_cnt = 18,
	spx5_stats_tx_late_coll_cnt = 19,
	spx5_stats_tx_xcoll_cnt = 20,
	spx5_stats_tx_csense_cnt = 21,
	spx5_stats_rx_ok_bytes_cnt = 22,
	spx5_stats_pmac_rx_ok_bytes_cnt = 23,
	spx5_stats_pmac_tx_mc_cnt = 24,
	spx5_stats_pmac_tx_bc_cnt = 25,
	spx5_stats_tx_xdefer_cnt = 26,
	spx5_stats_pmac_rx_mc_cnt = 27,
	spx5_stats_pmac_rx_bc_cnt = 28,
	spx5_stats_rx_in_range_len_err_cnt = 29,
	spx5_stats_pmac_rx_in_range_len_err_cnt = 30,
	spx5_stats_rx_out_of_range_len_err_cnt = 31,
	spx5_stats_pmac_rx_out_of_range_len_err_cnt = 32,
	spx5_stats_rx_oversize_cnt = 33,
	spx5_stats_pmac_rx_oversize_cnt = 34,
	spx5_stats_tx_pause_cnt = 35,
	spx5_stats_pmac_tx_pause_cnt = 36,
	spx5_stats_rx_pause_cnt = 37,
	spx5_stats_pmac_rx_pause_cnt = 38,
	spx5_stats_rx_unsup_opcode_cnt = 39,
	spx5_stats_pmac_rx_unsup_opcode_cnt = 40,
	spx5_stats_rx_undersize_cnt = 41,
	spx5_stats_pmac_rx_undersize_cnt = 42,
	spx5_stats_rx_fragments_cnt = 43,
	spx5_stats_pmac_rx_fragments_cnt = 44,
	spx5_stats_rx_jabbers_cnt = 45,
	spx5_stats_pmac_rx_jabbers_cnt = 46,
	spx5_stats_rx_size64_cnt = 47,
	spx5_stats_pmac_rx_size64_cnt = 48,
	spx5_stats_rx_size65to127_cnt = 49,
	spx5_stats_pmac_rx_size65to127_cnt = 50,
	spx5_stats_rx_size128to255_cnt = 51,
	spx5_stats_pmac_rx_size128to255_cnt = 52,
	spx5_stats_rx_size256to511_cnt = 53,
	spx5_stats_pmac_rx_size256to511_cnt = 54,
	spx5_stats_rx_size512to1023_cnt = 55,
	spx5_stats_pmac_rx_size512to1023_cnt = 56,
	spx5_stats_rx_size1024to1518_cnt = 57,
	spx5_stats_pmac_rx_size1024to1518_cnt = 58,
	spx5_stats_rx_size1519tomax_cnt = 59,
	spx5_stats_pmac_rx_size1519tomax_cnt = 60,
	spx5_stats_tx_size64_cnt = 61,
	spx5_stats_pmac_tx_size64_cnt = 62,
	spx5_stats_tx_size65to127_cnt = 63,
	spx5_stats_pmac_tx_size65to127_cnt = 64,
	spx5_stats_tx_size128to255_cnt = 65,
	spx5_stats_pmac_tx_size128to255_cnt = 66,
	spx5_stats_tx_size256to511_cnt = 67,
	spx5_stats_pmac_tx_size256to511_cnt = 68,
	spx5_stats_tx_size512to1023_cnt = 69,
	spx5_stats_pmac_tx_size512to1023_cnt = 70,
	spx5_stats_tx_size1024to1518_cnt = 71,
	spx5_stats_pmac_tx_size1024to1518_cnt = 72,
	spx5_stats_tx_size1519tomax_cnt = 73,
	spx5_stats_pmac_tx_size1519tomax_cnt = 74,
	spx5_stats_mm_rx_assembly_err_cnt = 75,
	spx5_stats_mm_rx_assembly_ok_cnt = 76,
	spx5_stats_mm_rx_merge_frag_cnt = 77,