path: root/drivers/net/ethernet/renesas/rswitch.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Renesas Ethernet Switch device driver
 *
 * Copyright (C) 2022 Renesas Electronics Corporation
 */

#ifndef __RSWITCH_H__
#define __RSWITCH_H__

#include <linux/platform_device.h>
#include "rcar_gen4_ptp.h"

#define RSWITCH_MAX_NUM_QUEUES	128

#define RSWITCH_NUM_PORTS	3
#define rswitch_for_each_enabled_port(priv, i)		\
	for (i = 0; i < RSWITCH_NUM_PORTS; i++)		\
		if (priv->rdev[i]->disabled)		\
			continue;			\
		else

#define rswitch_for_each_enabled_port_continue_reverse(priv, i)	\
	for (; i-- > 0; )					\
		if (priv->rdev[i]->disabled)			\
			continue;				\
		else

#define TX_RING_SIZE		1024
#define RX_RING_SIZE		4096
#define TS_RING_SIZE		(TX_RING_SIZE * RSWITCH_NUM_PORTS)

#define RSWITCH_MAX_MTU		9600
#define RSWITCH_HEADROOM	(NET_SKB_PAD + NET_IP_ALIGN)
#define RSWITCH_DESC_BUF_SIZE	2048
#define RSWITCH_TAILROOM	SKB_DATA_ALIGN(sizeof(struct skb_shared_info))
#define RSWITCH_ALIGN		128
#define RSWITCH_BUF_SIZE	(RSWITCH_HEADROOM + RSWITCH_DESC_BUF_SIZE + \
				 RSWITCH_TAILROOM + RSWITCH_ALIGN)
#define RSWITCH_MAP_BUF_SIZE	(RSWITCH_BUF_SIZE - RSWITCH_HEADROOM)
#define RSWITCH_MAX_CTAG_PCP	7

#define RSWITCH_TIMEOUT_US	100000

#define RSWITCH_TOP_OFFSET	0x00008000
#define RSWITCH_COMA_OFFSET	0x00009000
#define RSWITCH_ETHA_OFFSET	0x0000a000	/* with RMAC */
#define RSWITCH_ETHA_SIZE	0x00002000	/* with RMAC */
#define RSWITCH_GWCA0_OFFSET	0x00010000
#define RSWITCH_GWCA1_OFFSET	0x00012000

/* TODO: hardcoded ETHA/GWCA settings for now */
#define GWCA_IRQ_RESOURCE_NAME	"gwca0_rxtx%d"
#define GWCA_IRQ_NAME		"rswitch: gwca0_rxtx%d"
#define GWCA_NUM_IRQS		8
#define GWCA_INDEX		0
#define AGENT_INDEX_GWCA	3
#define GWCA_IPV_NUM		0
#define GWRO			RSWITCH_GWCA0_OFFSET

#define GWCA_TS_IRQ_RESOURCE_NAME	"gwca0_rxts0"
#define GWCA_TS_IRQ_NAME		"rswitch: gwca0_rxts0"
#define GWCA_TS_IRQ_BIT			BIT(0)

#define FWRO	0
#define TPRO	RSWITCH_TOP_OFFSET
#define CARO	RSWITCH_COMA_OFFSET
#define TARO	0
#define RMRO	0x1000
enum rswitch_reg {
	FWGC		= FWRO + 0x0000,
	FWTTC0		= FWRO + 0x0010,
	FWTTC1		= FWRO + 0x0014,
	FWLBMC		= FWRO + 0x0018,
	FWCEPTC		= FWRO + 0x0020,
	FWCEPRC0	= FWRO + 0x0024,
	FWCEPRC1	= FWRO + 0x0028,
	FWCEPRC2	= FWRO + 0x002c,
	FWCLPTC		= FWRO + 0x0030,
	FWCLPRC		= FWRO + 0x0034,
	FWCMPTC		= FWRO + 0x0040,
	FWEMPTC		= FWRO + 0x0044,
	FWSDMPTC	= FWRO + 0x0050,
	FWSDMPVC	= FWRO + 0x0054,
	FWLBWMC0	= FWRO + 0x0080,
	FWPC00		= FWRO + 0x0100,
	FWPC10		= FWRO + 0x0104,
	FWPC20		= FWRO + 0x0108,
	FWCTGC00	= FWRO + 0x0400,
	FWCTGC10	= FWRO + 0x0404,
	FWCTTC00	= FWRO + 0x0408,
	FWCTTC10	= FWRO + 0x040c,
	FWCTTC200	= FWRO + 0x0410,
	FWCTSC00	= FWRO + 0x0420,
	FWCTSC10	= FWRO + 0x0424,
	FWCTSC20	= FWRO + 0x0428,
	FWCTSC30	= FWRO + 0x042c,
	FWCTSC40	= FWRO + 0x0430,
	FWTWBFC0	= FWRO + 0x1000,
	FWTWBFVC0	= FWRO + 0x1004,
	FWTHBFC0	= FWRO + 0x1400,
	FWTHBFV0C0	= FWRO + 0x1404,
	FWTHBFV1C0	= FWRO + 0x1408,
	FWFOBFC0	= FWRO + 0x1800,
	FWFOBFV0C0	= FWRO + 0x1804,
	FWFOBFV1C0	= FWRO + 0x1808,
	FWRFC0		= FWRO + 0x1c00,
	FWRFVC0		= FWRO + 0x1c04,
	FWCFC0		= FWRO + 0x2000,
	FWCFMC00	= FWRO + 0x2004,
	FWIP4SC		= FWRO + 0x4008,
	FWIP6SC		= FWRO + 0x4018,
	FWIP6OC		= FWRO + 0x401c,
	FWL2SC		= FWRO + 0x4020,
	FWSFHEC		= FWRO + 0x4030,
	FWSHCR0		= FWRO + 0x4040,
	FWSHCR1		= FWRO + 0x4044,
	FWSHCR2		= FWRO + 0x4048,
	FWSHCR3		= FWRO + 0x404c,
	FWSHCR4		= FWRO + 0x4050,
	FWSHCR5		= FWRO + 0x4054,
	FWSHCR6		= FWRO + 0x4058,
	FWSHCR7		= FWRO + 0x405c,
	FWSHCR8		= FWRO + 0x4060,
	FWSHCR9		= FWRO + 0x4064,
	FWSHCR10	= FWRO + 0x4068,
	FWSHCR11	= FWRO + 0x406c,
	FWSHCR12	= FWRO + 0x4070,
	FWSHCR13	= FWRO + 0x4074,
	FWSHCRR		= FWRO + 0x4078,
	FWLTHHEC	= FWRO + 0x4090,
	FWLTHHC		= FWRO + 0x4094,
	FWLTHTL0	= FWRO + 0x40a0,
	FWLTHTL1	= FWRO + 0x40a4,
	FWLTHTL2	= FWRO + 0x40a8,
	FWLTHTL3	= FWRO + 0x40ac,
	FWLTHTL4	= FWRO + 0x40b0,
	FWLTHTL5	= FWRO + 0x40b4,
	FWLTHTL6	= FWRO + 0x40b8,
	FWLTHTL7	= FWRO + 0x40bc,
	FWLTHTL80	= FWRO + 0x40c0,
	FWLTHTL9	= FWRO + 0x40d0,
	FWLTHTLR	= FWRO + 0x40d4,
	FWLTHTIM	= FWRO + 0x40e0,
	FWLTHTEM	= FWRO + 0x40e4,
	FWLTHTS0	= FWRO + 0x4100,
	FWLTHTS1	= FWRO + 0x4104,
	FWLTHTS2	= FWRO + 0x4108,
	FWLTHTS3	= FWRO + 0x410c,
	FWLTHTS4	= FWRO + 0x4110,
	FWLTHTSR0	= FWRO + 0x4120,
	FWLTHTSR1	= FWRO + 0x4124,
	FWLTHTSR2	= FWRO + 0x4128,
	FWLTHTSR3	= FWRO + 0x412c,
	FWLTHTSR40	= FWRO + 0x4130,
	FWLTHTSR5	= FWRO + 0x4140,
	FWLTHTR		= FWRO + 0x4150,
	FWLTHTRR0	= FWRO + 0x4154,
	FWLTHTRR1	= FWRO + 0x4158,
	FWLTHTRR2	= FWRO + 0x415c,
	FWLTHTRR3	= FWRO + 0x4160,
	FWLTHTRR4	= FWRO + 0x4164,
	FWLTHTRR5	= FWRO + 0x4168,
	FWLTHTRR6	= FWRO + 0x416c,
	FWLTHTRR7	= FWRO + 0x4170,
	FWLTHTRR8	= FWRO + 0x4174,
	FWLTHTRR9	= FWRO + 0x4180,
	FWLTHTRR10	= FWRO + 0x4190,
	FWIPHEC		= FWRO + 0x4214,
	FWIPHC		= FWRO + 0x4218,
	FWIPTL0		= FWRO + 0x4220,
	FWIPTL1		= FWRO + 0x4224,
	FWIPTL2		= FWRO + 0x4228,
	FWIPTL3		= FWRO + 0x422c,
	FWIPTL4		= FWRO + 0x4230,
	FWIPTL5		= FWRO +