/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* This software may be redistributed and/or modified under
* the terms of the GNU General Public License as published by the Free
* Software Foundation; either version 2 of the License, or
* any later version.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* File: via-velocity.h
*
* Purpose: Header file to define driver's private structures.
*
* Author: Chuang Liang-Shing, AJ Jiang
*
* Date: Jan 24, 2003
*/
#ifndef VELOCITY_H
#define VELOCITY_H
#define VELOCITY_TX_CSUM_SUPPORT
#define VELOCITY_NAME "via-velocity"
#define VELOCITY_FULL_DRV_NAM "VIA Networking Velocity Family Gigabit Ethernet Adapter Driver"
#define VELOCITY_VERSION "1.14"
#define VELOCITY_IO_SIZE 256
#define PKT_BUF_SZ 1540
#define MAX_UNITS 8
#define OPTION_DEFAULT { [0 ... MAX_UNITS-1] = -1}
#define REV_ID_VT6110 (0)
#define BYTE_REG_BITS_ON(x,p) do { writeb(readb((p))|(x),(p));} while (0)
#define WORD_REG_BITS_ON(x,p) do { writew(readw((p))|(x),(p));} while (0)
#define DWORD_REG_BITS_ON(x,p) do { writel(readl((p))|(x),(p));} while (0)
#define BYTE_REG_BITS_IS_ON(x,p) (readb((p)) & (x))
#define WORD_REG_BITS_IS_ON(x,p) (readw((p)) & (x))
#define DWORD_REG_BITS_IS_ON(x,p) (readl((p)) & (x))
#define BYTE_REG_BITS_OFF(x,p) do { writeb(readb((p)) & (~(x)),(p));} while (0)
#define WORD_REG_BITS_OFF(x,p) do { writew(readw((p)) & (~(x)),(p));} while (0)
#define DWORD_REG_BITS_OFF(x,p) do { writel(readl((p)) & (~(x)),(p));} while (0)
#define BYTE_REG_BITS_SET(x,m,p) do { writeb( (readb((p)) & (~(m))) |(x),(p));} while (0)
#define WORD_REG_BITS_SET(x,m,p) do { writew( (readw((p)) & (~(m))) |(x),(p));} while (0)
#define DWORD_REG_BITS_SET(x,m,p) do { writel( (readl((p)) & (~(m)))|(x),(p));} while (0)
#define VAR_USED(p) do {(p)=(p);} while (0)
/*
* Purpose: Structures for MAX RX/TX descriptors.
*/
#define B_OWNED_BY_CHIP 1
#define B_OWNED_BY_HOST 0
/*
* Bits in the RSR0 register
*/
#define RSR_DETAG cpu_to_le16(0x0080)
#define RSR_SNTAG cpu_to_le16(0x0040)
#define RSR_RXER cpu_to_le16(0x0020)
#define RSR_RL cpu_to_le16(0x0010)
#define RSR_CE cpu_to_le16(0x0008)
#define RSR_FAE cpu_to_le16(0x0004)
#define RSR_CRC cpu_to_le16(0x0002)
#define RSR_VIDM cpu_to_le16(0x0001)
/*
* Bits in the RSR1 register
*/
#define RSR_RXOK cpu_to_le16(0x8000) // rx OK
#define RSR_PFT cpu_to_le16(0x4000) // Perfect filtering address match
#define RSR_MAR cpu_to_le16(0x2000) // MAC accept multicast address packet
#define RSR_BAR cpu_to_le16(0x1000) // MAC accept broadcast address packet
#define RSR_PHY cpu_to_le16(0x0800) // MAC accept physical address packet
#define RSR_VTAG cpu_to_le16(0x0400) // 802.1p/1q tagging packet indicator
#define RSR_STP cpu_to_le16(0x0200) // start of packet
#define RSR_EDP cpu_to_le16(0x0100) // end of packet
/*
* Bits in the CSM register
*/
#define CSM_IPOK 0x40 //IP Checkusm validatiaon ok
#define CSM_TUPOK 0x20 //TCP/UDP Checkusm validatiaon ok
#define CSM_FRAG 0x10 //Fragment IP datagram
#define CSM_IPKT
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