path: root/drivers/net/wireless/ath/ath11k/pci.c

// SPDX-License-Identifier: BSD-3-Clause-Clear
/*
 * Copyright (c) 2019-2020 The Linux Foundation. All rights reserved.
 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <linux/module.h>
#include <linux/msi.h>
#include <linux/pci.h>
#include <linux/of.h>

#include "pci.h"
#include "core.h"
#include "hif.h"
#include "mhi.h"
#include "debug.h"
#include "pcic.h"
#include "qmi.h"

#define ATH11K_PCI_BAR_NUM		0
#define ATH11K_PCI_DMA_MASK		36
#define ATH11K_PCI_COHERENT_DMA_MASK	32

#define TCSR_SOC_HW_VERSION		0x0224
#define TCSR_SOC_HW_VERSION_MAJOR_MASK	GENMASK(11, 8)
#define TCSR_SOC_HW_VERSION_MINOR_MASK	GENMASK(7, 0)

#define QCA6390_DEVICE_ID		0x1101
#define QCN9074_DEVICE_ID		0x1104
#define WCN6855_DEVICE_ID		0x1103

#define TCSR_SOC_HW_SUB_VER	0x1910010

static const struct pci_device_id ath11k_pci_id_table[] = {
	{ PCI_VDEVICE(QCOM, QCA6390_DEVICE_ID) },
	{ PCI_VDEVICE(QCOM, WCN6855_DEVICE_ID) },
	{ PCI_VDEVICE(QCOM, QCN9074_DEVICE_ID) },
	{0}
};

MODULE_DEVICE_TABLE(pci, ath11k_pci_id_table);

static int ath11k_pci_bus_wake_up(struct ath11k_base *ab)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);

	return mhi_device_get_sync(ab_pci->mhi_ctrl->mhi_dev);
}

static void ath11k_pci_bus_release(struct ath11k_base *ab)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);

	mhi_device_put(ab_pci->mhi_ctrl->mhi_dev);
}

static u32 ath11k_pci_get_window_start(struct ath11k_base *ab, u32 offset)
{
	if (!ab->hw_params.static_window_map)
		return ATH11K_PCI_WINDOW_START;

	if ((offset ^ HAL_SEQ_WCSS_UMAC_OFFSET) < ATH11K_PCI_WINDOW_RANGE_MASK)
		/* if offset lies within DP register range, use 3rd window */
		return 3 * ATH11K_PCI_WINDOW_START;
	else if ((offset ^ HAL_SEQ_WCSS_UMAC_CE0_SRC_REG(ab)) <
		 ATH11K_PCI_WINDOW_RANGE_MASK)
		 /* if offset lies within CE register range, use 2nd window */
		return 2 * ATH11K_PCI_WINDOW_START;
	else
		return ATH11K_PCI_WINDOW_START;
}

static inline void ath11k_pci_select_window(struct ath11k_pci *ab_pci, u32 offset)
{
	struct ath11k_base *ab = ab_pci->ab;

	u32 window = FIELD_GET(ATH11K_PCI_WINDOW_VALUE_MASK, offset);

	lockdep_assert_held(&ab_pci->window_lock);

	if (window != ab_pci->register_window) {
		iowrite32(ATH11K_PCI_WINDOW_ENABLE_BIT | window,
			  ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
		ioread32(ab->mem + ATH11K_PCI_WINDOW_REG_ADDRESS);
		ab_pci->register_window = window;
	}
}

static void
ath11k_pci_window_write32(struct ath11k_base *ab, u32 offset, u32 value)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
	u32 window_start;

	window_start = ath11k_pci_get_window_start(ab, offset);

	if (window_start == ATH11K_PCI_WINDOW_START) {
		spin_lock_bh(&ab_pci->window_lock);
		ath11k_pci_select_window(ab_pci, offset);
		iowrite32(value, ab->mem + window_start +
			  (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
		spin_unlock_bh(&ab_pci->window_lock);
	} else {
		iowrite32(value, ab->mem + window_start +
			  (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
	}
}

static u32 ath11k_pci_window_read32(struct ath11k_base *ab, u32 offset)
{
	struct ath11k_pci *ab_pci = ath11k_pci_priv(ab);
	u32 window_start, val;

	window_start = ath11k_pci_get_window_start(ab, offset);

	if (window_start == ATH11K_PCI_WINDOW_START) {
		spin_lock_bh(&ab_pci->window_lock);
		ath11k_pci_select_window(ab_pci, offset);
		val = ioread32(ab->mem + window_start +
			       (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
		spin_unlock_bh(&ab_pci->window_lock);
	} else {
		val = ioread32(ab->mem + window_start +
			       (offset & ATH11K_PCI_WINDOW_RANGE_MASK));
	}

	return val;
}

int ath11k_pci_get_msi_irq(struct ath11k_base *ab, unsigned int vector)
{
	struct pci_dev *pci_dev = to_pci_dev(ab->dev);

	return pci_irq_vector(pci_dev, vector);
}

static const struct ath11k_pci_ops ath11k_pci_ops_qca6390 = {
	.wakeup = ath11k_pci_bus_wake_up,
	.release = ath11k_pci_bus_release,
	.get_msi_irq = ath11k_pci_get_msi_irq,
	.window_write32 = ath11k_pci_window_write32,
	.window_read32 = ath11k_pci_window_read32,
};

static const struct ath11k_pci_ops ath11k_pci_ops_qcn9074 = {
	.wakeup = NULL,
	.release = NULL,
	.get_msi_irq = ath11k_pci_get_msi_irq,
	.window_write32 = ath11k_pci_window_write32,
	.window_read32 = ath11k_pci_window_read32,
};

static const struct ath11k_msi_config msi_config_one_msi = {
	.total_vectors = 1,
	.total_users = 4,
	.users = (struct ath11k_msi_user[]) {
		{ .name = "MHI", .num_vectors = 3, .base_vector = 0 },
		{ .name = "CE", .num_vectors = 1, .base_vector = 0 },
		{ .name = "WAKE", .num_vectors = 1, .base_vector =