path: root/drivers/perf/alibaba_uncore_drw_pmu.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Alibaba DDR Sub-System Driveway PMU driver
 *
 * Copyright (C) 2022 Alibaba Inc
 */

#define ALI_DRW_PMUNAME		"ali_drw"
#define ALI_DRW_DRVNAME		ALI_DRW_PMUNAME "_pmu"
#define pr_fmt(fmt)		ALI_DRW_DRVNAME ": " fmt

#include <linux/acpi.h>
#include <linux/bitfield.h>
#include <linux/bitmap.h>
#include <linux/bitops.h>
#include <linux/cpuhotplug.h>
#include <linux/cpumask.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/perf_event.h>
#include <linux/platform_device.h>
#include <linux/printk.h>
#include <linux/rculist.h>
#include <linux/refcount.h>


#define ALI_DRW_PMU_COMMON_MAX_COUNTERS			16
#define ALI_DRW_PMU_TEST_SEL_COMMON_COUNTER_BASE	19

#define ALI_DRW_PMU_PA_SHIFT			12
#define ALI_DRW_PMU_CNT_INIT			0x00000000
#define ALI_DRW_CNT_MAX_PERIOD			0xffffffff
#define ALI_DRW_PMU_CYCLE_EVT_ID		0x80

#define ALI_DRW_PMU_CNT_CTRL			0xC00
#define ALI_DRW_PMU_CNT_RST			BIT(2)
#define ALI_DRW_PMU_CNT_STOP			BIT(1)
#define ALI_DRW_PMU_CNT_START			BIT(0)

#define ALI_DRW_PMU_CNT_STATE			0xC04
#define ALI_DRW_PMU_TEST_CTRL			0xC08
#define ALI_DRW_PMU_CNT_PRELOAD			0xC0C

#define ALI_DRW_PMU_CYCLE_CNT_HIGH_MASK		GENMASK(23, 0)
#define ALI_DRW_PMU_CYCLE_CNT_LOW_MASK		GENMASK(31, 0)
#define ALI_DRW_PMU_CYCLE_CNT_HIGH		0xC10
#define ALI_DRW_PMU_CYCLE_CNT_LOW		0xC14

/* PMU EVENT SEL 0-3 are paired in 32-bit registers on a 4-byte stride */
#define ALI_DRW_PMU_EVENT_SEL0			0xC68
/* counter 0-3 use sel0, counter 4-7 use sel1...*/
#define ALI_DRW_PMU_EVENT_SELn(n) \
	(ALI_DRW_PMU_EVENT_SEL0 + (n / 4) * 0x4)
#define ALI_DRW_PMCOM_CNT_EN			BIT(7)
#define ALI_DRW_PMCOM_CNT_EVENT_MASK		GENMASK(5, 0)
#define ALI_DRW_PMCOM_CNT_EVENT_OFFSET(n) \
	(8 * (n % 4))

/* PMU COMMON COUNTER 0-15, are paired in 32-bit registers on a 4-byte stride */
#define ALI_DRW_PMU_COMMON_COUNTER0		0xC78
#define ALI_DRW_PMU_COMMON_COUNTERn(n) \
	(ALI_DRW_PMU_COMMON_COUNTER0 + 0x4 * (n))

#define ALI_DRW_PMU_OV_INTR_ENABLE_CTL		0xCB8
#define ALI_DRW_PMU_OV_INTR_DISABLE_CTL		0xCBC
#define ALI_DRW_PMU_OV_INTR_ENABLE_STATUS	0xCC0
#define ALI_DRW_PMU_OV_INTR_CLR			0xCC4
#define ALI_DRW_PMU_OV_INTR_STATUS		0xCC8
#define ALI_DRW_PMCOM_CNT_OV_INTR_MASK		GENMASK(23, 8)
#define ALI_DRW_PMBW_CNT_OV_INTR_MASK		GENMASK(7, 0)
#define ALI_DRW_PMU_OV_INTR_MASK		GENMASK_ULL(63, 0)

static int ali_drw_cpuhp_state_num;

static LIST_HEAD(ali_drw_pmu_irqs);
static DEFINE_MUTEX(ali_drw_pmu_irqs_lock);

struct ali_drw_pmu_irq {
	struct hlist_node node;
	struct list_head irqs_node;
	struct list_head pmus_node;
	int irq_num;
	int cpu;
	refcount_t refcount;
};

struct ali_drw_pmu {
	void __iomem *cfg_base;
	struct device *dev;

	struct list_head pmus_node;
	struct ali_drw_pmu_irq *irq;
	int irq_num;
	int cpu;
	DECLARE_BITMAP(used_mask, ALI_DRW_PMU_COMMON_MAX_COUNTERS);
	struct perf_event *events[ALI_DRW_PMU_COMMON_MAX_COUNTERS];
	int evtids[ALI_DRW_PMU_COMMON_MAX_COUNTERS];

	struct pmu pmu;
};

#define to_ali_drw_pmu(p) (container_of(p, struct ali_drw_pmu, pmu))

#define DRW_CONFIG_EVENTID		GENMASK(7, 0)
#define GET_DRW_EVENTID(event)	FIELD_GET(DRW_CONFIG_EVENTID, (event)->attr.config)

static ssize_t ali_drw_pmu_format_show(struct device *dev,
				struct device_attribute *attr, char *buf)
{
	struct dev_ext_attribute *eattr;

	eattr = container_of(attr, struct dev_ext_attribute, attr);

	return sprintf(buf, "%s\n", (char *)eattr->var);
}

/*
 * PMU event attributes
 */
static ssize_t ali_drw_pmu_event_show(struct device *dev,
			       struct device_attribute *attr, char *page)
{
	struct dev_ext_attribute *eattr;

	eattr = container_of(attr, struct dev_ext_attribute, attr);

	return sprintf(page, "config=0x%lx\n", (unsigned long)eattr->var);
}

#define ALI_DRW_PMU_ATTR(_name, _func, _config)                            \
		(&((struct dev_ext_attribute[]) {                               \
				{ __ATTR(_name, 0444, _func, NULL), (void *)_config }   \
		})[0].attr.attr)

#define ALI_DRW_PMU_FORMAT_ATTR(_name, _config)            \
	ALI_DRW_PMU_ATTR(_name, ali_drw_pmu_format_show, (void *)_config)
#define ALI_DRW_PMU_EVENT_ATTR(_name, _config)             \
	ALI_DRW_PMU_ATTR(_name, ali_drw_pmu_event_show, (unsigned long)_config)

static struct attribute *ali_drw_pmu_events_attrs[] = {
	ALI_DRW_PMU_EVENT_ATTR(hif_rd_or_wr,			0x0),
	ALI_DRW_PMU_EVENT_ATTR(hif_wr,				0x1),
	ALI_DRW_PMU_EVENT_ATTR(hif_rd,				0x2),
	ALI_DRW_PMU_EVENT_ATTR(hif_rmw,				0x3),
	ALI_DRW_PMU_EVENT_ATTR(hif_hi_pri_rd,			0x4),
	ALI_DRW_PMU_EVENT_ATTR(dfi_wr_data_cycles,		0x7),
	ALI_DRW_PMU_EVENT_ATTR(dfi_rd_data_cycles,		0x8),
	ALI_DRW_PMU_EVENT_ATTR(hpr_xact_when_critical,		0x9),
	ALI_DRW_PMU_EVENT_ATTR(lpr_xact_when_critical,		0xA),
	ALI_DRW_PMU_EVENT_ATTR(wr_xact_when_critical,		0xB),
	ALI_DRW_PMU_EVENT_ATTR(op_is_activate,			0xC),
	ALI_DRW_PMU_EVENT_ATTR(op_is_rd_or_wr,			0xD),
	ALI_DRW_PMU_EVENT_ATTR(op_is_rd_activate,		0xE),
	ALI_DRW_PMU_EVENT_ATTR(op_is_rd,			0xF),
	ALI_DRW_PMU_EVENT_ATTR(op_is_wr,			0x10),
	ALI_DRW_PMU_EVENT_ATTR(op_is_mwr,			0x11),
	ALI_DRW_PMU_EVENT_ATTR(op_is_precharge,			0x12),
	ALI_DRW_PMU_EVENT_ATTR(precharge_for_rdwr,		0x13),
	ALI_DRW_PMU_EVENT_ATTR(precharge_for_other,		0x14),
	ALI_DRW_PMU_EVENT_ATTR(rdwr_transitions,		0x15),
	ALI_DRW_PMU_EVENT_ATTR(write_combine,			0x16),
	ALI_DRW_PMU_EVENT_ATTR(war_hazard,			0x17),
	ALI_DRW_PMU_EVENT_ATTR(raw_hazard,			0x18),
	ALI_DRW_PMU_EVENT_ATTR(waw_hazard,			0x19),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_selfref_rk0,		0x1A),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_selfref_rk1,		0x1B),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_selfref_rk2,		0x1C),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_selfref_rk3,		0x1D),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_powerdown_rk0,	0x1E),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_powerdown_rk1,	0x1F),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_powerdown_rk2,	0x20),
	ALI_DRW_PMU_EVENT_ATTR(op_is_enter_powerdown_rk3,	0x21),
	ALI_DRW_PMU_EVENT_ATTR(selfref_mode_rk0,		0x26),
	ALI_DRW_PMU_EVENT_ATTR(selfref_mode_rk1,		0x27),
	ALI_DRW_PMU_EVENT_ATTR(selfref_mode_rk2,		0x28),
	ALI_DRW_PMU_EVENT_ATTR(selfref_mode_rk3,		0x29),
	ALI_DRW_PMU_EVENT_ATTR(op_is_refresh,			0x2A),
	ALI_DRW_PMU_EVENT_ATTR(op_is_crit_ref,			0x2B),
	ALI_DRW_PMU_EVENT_ATTR(op_is_load_mode,			0x2D),
	ALI_DRW_PMU_EVENT_ATTR(op_is_zqcl,			0x2E),
	ALI_DRW_PMU_EVENT_ATTR(visible_window_limit_reached_rd, 0x30),
	ALI_DRW_PMU_EVENT_ATTR(visible_window_limit_reached_wr, 0x31),
	ALI_DRW_PMU_EVENT_ATTR(op_is_dqsosc_mpc,		0x34),
	ALI_DRW_PMU_EVENT_ATTR(op_is_dqsosc_mrr,		0x35),
	ALI_DRW_PMU_EVENT_ATTR(op_is_tcr_mrr,			0x36),
	ALI_DRW_PMU_EVENT_ATTR(op_is_zqstart,			0x37),
	ALI_DRW_PMU_EVENT_ATTR(op_is_zqlatch,			0x38),
	ALI_DRW_PMU_EVENT_ATTR(chi_txreq,			0x39),
	ALI_DRW_PMU_EVENT_ATTR(chi_txdat,			0x3A),
	ALI_DRW_PMU_EVENT_ATTR(chi_rxdat,			0x3B),
	ALI_DRW_PMU_EVENT_ATTR(chi_rxrsp,			0x3C),
	ALI_DRW_PMU_EVENT_ATTR(tsz_vio,				0x3D),
	ALI_DRW_PMU_EVENT_ATTR(cycle,				0x80),
	NULL,
};

static struct attribute_group ali_drw_pmu_events_attr_group = {
	.name = "events",
	.attrs = ali_drw_pmu_events_attrs,
};

static struct attribute *ali_drw_pmu_format_attr[] = {
	ALI_DRW_PMU_FORMAT_ATTR(event, "config:0-7"),
	NULL,
};

static const struct attribute_group ali_drw_pmu_format_group = {
	.name = "format",
	.attrs = ali_drw_pmu_format_attr,
};

static ssize_t ali_drw_pmu_cpumask_show(struct device *dev,
					struct device_attribute *attr,
					char *buf)
{
	struct ali_drw_pmu *drw_pmu = to_ali_drw_pmu(dev_get_drvdata(dev));

	return cpumap_print_to_pagebuf(true, buf, cpumask_of(drw_pmu->cpu));
}

static struct device_attribute ali_drw_pmu_cpumask_attr =
		__ATTR(cpumask, 0444, ali_drw_pmu_cpumask_show, NULL);

static struct attribute *ali_drw_pmu_cpumask_attrs[] = {
	&ali_drw_pmu_cpumask_attr.attr,
	NULL,
};

static const struct attribute_group ali_drw_pmu_cpumask_attr_group = {
	.attrs = ali_drw_pmu_cpumask_attrs,
};

static umode_t ali_drw_pmu_identifier_attr_visible(struct kobject *kobj,
						struct attribute *attr, int n)
{
	return attr->mode;
}

static DEVICE_STRING_ATTR_RO(ali_drw_pmu_identifier, 0444, "ali_drw_pmu");

static struct attribute *ali_drw_pmu_identifier_attrs[] = {
	&dev_attr_ali_drw_pmu_identifier.attr.attr,
	NULL
};

static const struct attribute_group ali_drw_pmu_identifier_attr_group = {
	.attrs = ali_drw_pmu_identifier_attrs,
	.is_visible = ali_drw_pmu_identifier_attr_visible
};

static const struct attribute_group *ali_drw_pmu_attr_groups[] = {
	&ali_drw_pmu_events_attr_group,
	&ali_drw_pmu_cpumask_attr_group,
	&ali_drw_pmu_format_group,
	&ali_drw_pmu_identifier_attr_group,
	NULL,
};

/* find a count