drivers/pinctrl/mediatek/pinctrl-mt6765.c


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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2018 MediaTek Inc.
 *
 * Author: ZH Chen <zh.chen@mediatek.com>
 *
 */

#include <linux/module.h>
#include "pinctrl-mtk-mt6765.h"
#include "pinctrl-paris.h"

/* MT6765 have multiple bases to program pin configuration listed as the below:
 * iocfg[0]:0x10005000, iocfg[1]:0x10002C00, iocfg[2]:0x10002800,
 * iocfg[3]:0x10002A00, iocfg[4]:0x10002000, iocfg[5]:0x10002200,
 * iocfg[6]:0x10002500, iocfg[7]:0x10002600.
 * _i_base could be used to indicate what base the pin should be mapped into.
 */

#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		       _x_bits, 32, 0)

#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		      _x_bits, 32, 1)

static const struct mtk_pin_field_calc mt6765_pin_mode_range[] = {
	PIN_FIELD(0, 202, 0x300, 0x10, 0, 4),
};

static const struct mtk_pin_field_calc mt6765_pin_dir_range[] = {
	PIN_FIELD(0, 202, 0x0, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt6765_pin_di_range[] = {
	PIN_FIELD(0, 202, 0x200, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt6765_pin_do_range[] = {
	PIN_FIELD(0, 202, 0x100, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt6765_pin_smt_range[] = {
	PINS_FIELD_BASE(0, 3, 2, 0x00b0, 0x10, 4, 1),
	PINS_FIELD_BASE(4, 7, 2, 0x00b0, 0x10, 5, 1),
	PIN_FIELD_BASE(8, 8, 3, 0x0080, 0x10, 3, 1),
	PINS_FIELD_BASE(9, 11, 2, 0x00b0, 0x10, 6, 1),
	PIN_FIELD_BASE(12, 12, 5, 0x0060, 0x10, 9, 1),
	PINS_FIELD_BASE(13, 16, 6, 0x00b0, 0x10, 10, 1),
	PINS_FIELD_BASE(17, 20, 6, 0x00b0, 0x10, 8, 1),
	PINS_FIELD_BASE(21, 24, 6, 0x00b0, 0x10, 9, 1),
	PINS_FIELD_BASE(25, 28, 6, 0x00b0, 0x10, 7, 1),
	PIN_FIELD_BASE(29, 29, 6, 0x00b0, 0x10, 0, 1),
	PIN_FIELD_BASE(30, 30, 6, 0x00b0, 0x10, 1, 1),
	PINS_FIELD_BASE(31, 34, 6, 0x00b0, 0x10, 2, 1),
	PINS_FIELD_BASE(35, 36, 6, 0x00b0, 0x10, 5, 1),
	PIN_FIELD_BASE(37, 37, 6, 0x00b0, 0x10, 6, 1),
	PIN_FIELD_BASE(38, 38, 6, 0x00b0, 0x10, 4, 1),
	PINS_FIELD_BASE(39, 40, 6, 0x00b0, 0x10, 3, 1),
	PINS_FIELD_BASE(41, 42, 7, 0x00c0, 0x10, 6, 1),
	PIN_FIELD_BASE(43, 43, 7, 0x00c0, 0x10, 3, 1),
	PIN_FIELD_BASE(44, 44, 7, 0x00c0, 0x10, 4, 1),
	PIN_FIELD_BASE(45, 45, 7, 0x00c0, 0x10, 8, 1),
	PINS_FIELD_BASE(46, 47, 7, 0x00c0, 0x10, 7, 1),
	PIN_FIELD_BASE(48, 48, 7, 0x00c0, 0x10, 15, 1),
	PIN_FIELD_BASE(49, 49, 7, 0x00c0, 0x10, 17, 1),
	PIN_FIELD_BASE(50, 50, 7, 0x00c0, 0x10, 14, 1),
	PIN_FIELD_BASE(51, 51, 7, 0x00c0, 0x10, 16, 1),
	PINS_FIELD_BASE(52, 57, 7, 0x00c0, 0x10, 0, 1),
	PINS_FIELD_BASE(58, 60, 7, 0x00c0, 0x10, 12, 1),
	PINS_FIELD_BASE(61, 62, 3, 0x0080, 0x10, 5, 1),
	PINS_FIELD_BASE(63, 64, 3, 0x0080, 0x10, 4, 1),
	PINS_FIELD_BASE(65, 66, 3, 0x0080, 0x10, 7, 1),
	PINS_FIELD_BASE(67, 68, 3, 0x0080, 0x10, 6, 1),
	PINS_FIELD_BASE(69, 73, 3, 0x0080, 0x10, 1, 1),
	PINS_FIELD_BASE(74, 78, 3, 0x0080, 0x10, 2, 1),
	PINS_FIELD_BASE(79, 80, 3, 0x0080, 0x10, 0, 1),