drivers/pinctrl/mediatek/pinctrl-mt7981.c


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// SPDX-License-Identifier: GPL-2.0
/*
 * The MT7981 driver based on Linux generic pinctrl binding.
 *
 * Copyright (C) 2020 MediaTek Inc.
 * Author: Sam Shih <sam.shih@mediatek.com>
 */

#include "pinctrl-moore.h"

#define MT7981_PIN(_number, _name)				\
	MTK_PIN(_number, _name, 0, _number, DRV_GRP4)

#define PIN_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		       _x_bits, 32, 0)

#define PINS_FIELD_BASE(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit, _x_bits)	\
	PIN_FIELD_CALC(_s_pin, _e_pin, _i_base, _s_addr, _x_addrs, _s_bit,	\
		      _x_bits, 32, 1)

static const struct mtk_pin_field_calc mt7981_pin_mode_range[] = {
	PIN_FIELD(0, 56, 0x300, 0x10, 0, 4),
};

static const struct mtk_pin_field_calc mt7981_pin_dir_range[] = {
	PIN_FIELD(0, 56, 0x0, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt7981_pin_di_range[] = {
	PIN_FIELD(0, 56, 0x200, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt7981_pin_do_range[] = {
	PIN_FIELD(0, 56, 0x100, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt7981_pin_ies_range[] = {
	PIN_FIELD_BASE(0, 0, 1, 0x10, 0x10, 1, 1),
	PIN_FIELD_BASE(1, 1, 1, 0x10, 0x10, 0, 1),
	PIN_FIELD_BASE(2, 2, 5, 0x20, 0x10, 6, 1),
	PIN_FIELD_BASE(3, 3, 4, 0x20, 0x10, 6, 1),
	PIN_FIELD_BASE(4, 4, 4, 0x20, 0x10, 2, 1),
	PIN_FIELD_BASE(5, 5, 4, 0x20, 0x10, 1, 1),
	PIN_FIELD_BASE(6, 6, 4, 0x20, 0x10, 3, 1),
	PIN_FIELD_BASE(7, 7, 4, 0x20, 0x10, 0, 1),
	PIN_FIELD_BASE(8, 8, 4, 0x20, 0x10, 4, 1),

	PIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1),
	PIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1),
	PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1),
	PIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1),
	PIN_FIELD_BASE(13, 13, 5, 0x20, 0x10, 11, 1),

	PIN_FIELD_BASE(14, 14, 4, 0x20, 0x10, 8, 1),

	PIN_FIELD_BASE(15, 15, 2, 0x20, 0x10, 0, 1),
	PIN_FIELD_BASE(16, 16, 2, 0x20, 0x10, 1, 1),
	PIN_FIELD_BASE(17, 17, 2, 0x20, 0x10, 5, 1),
	PIN_FIELD_BASE(18, 18, 2, 0x20, 0x10, 4, 1),
	PIN_FIELD_BASE(19, 19, 2, 0x20, 0x10, 2, 1),
	PIN_FIELD_BASE(20, 20, 2, 0x20, 0x10, 3, 1),
	PIN_FIELD_BASE(21, 21, 2, 0x20, 0x10, 6, 1),
	PIN_FIELD_BASE(22, 22, 2, 0x20, 0x10, 7, 1),
	PIN_FIELD_BASE(23, 23, 2, 0x20, 0x10, 10, 1),
	PIN_FIELD_BASE(24, 24, 2, 0x20, 0x10, 9, 1),
	PIN_FIELD_BASE(25, 25, 2, 0x20, 0x10, 8, 1),

	PIN_FIELD_BASE(26, 26, 5, 0x20, 0x10, 0, 1),
	PIN_FIELD_BASE(27, 27, 5, 0x20, 0x10, 4, 1),
	PIN_FIELD_BASE(28, 28, 5, 0x20, 0x10, 3, 1),
	PIN_FIELD_BASE(29, 29, 5, 0x20, 0x10, 1, 1),
	PIN_FIELD_BASE(30, 30, 5, 0x20, 0x10, 2, 1),
	PIN_FIELD_BASE(31, 31, 5, 0x20, 0x10, 5, 1),

	PIN_FIELD_BASE(32, 32, 1, 0x10, 0x10, 2, 1),
	PIN_FIELD_BASE(33, 33, 1, 0x10, 0x10, 3, 1),

	PIN_FIELD_BASE(34, 34, 4, 0x20, 0x10, 5, 1),
	PIN_FIELD_BASE(35, 35, 4, 0x20, 0x10, 7, 1),

	PIN_FIELD_BASE(36, 36, 3, 0x10, 0x10, 2, 1),
	PIN_FIELD_BASE(37, 37, 3, 0x10, 0x10, 3, 1),
	PIN_FIELD_BASE(38, 38, 3, 0x10, 0x10, 0, 1),
	PIN_FIELD_BASE(39, 39, 3,