drivers/pinctrl/mediatek/pinctrl-mt8195.c


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// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (C) 2020 MediaTek Inc.
 *
 * Author: Zhiyong Tao <zhiyong.tao@mediatek.com>
 *
 */

#include "pinctrl-mtk-mt8195.h"
#include "pinctrl-paris.h"

/* MT8195 have multiple bases to program pin configuration listed as the below:
 * iocfg[0]:0x10005000, iocfg[1]:0x11d10000, iocfg[2]:0x11d30000,
 * iocfg[3]:0x11d40000, iocfg[4]:0x11e20000, iocfg[5]:0x11eb0000,
 * iocfg[6]:0x11f40000.
 * _i_based could be used to indicate what base the pin should be mapped into.
 */

#define PIN_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
	PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \
		       32, 0)

#define PINS_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
	PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits,  \
		       32, 1)

static const struct mtk_pin_field_calc mt8195_pin_mode_range[] = {
	PIN_FIELD(0, 144, 0x300, 0x10, 0, 4),
};

static const struct mtk_pin_field_calc mt8195_pin_dir_range[] = {
	PIN_FIELD(0, 144, 0x0, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8195_pin_di_range[] = {
	PIN_FIELD(0, 144, 0x200, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8195_pin_do_range[] = {
	PIN_FIELD(0, 144, 0x100, 0x10, 0, 1),
};

static const struct mtk_pin_field_calc mt8195_pin_ies_range[] = {
	PIN_FIELD_BASE(0, 0, 4, 0x040, 0x10, 0, 1),
	PIN_FIELD_BASE(1, 1, 4, 0x040, 0x10, 1, 1),
	PIN_FIELD_BASE(2, 2, 4, 0x040, 0x10, 2, 1),
	PIN_FIELD_BASE(3, 3, 4, 0x040, 0x10, 3, 1),
	PIN_FIELD_BASE(4, 4, 4, 0x040, 0x10, 4, 1),
	PIN_FIELD_BASE(5, 5, 4, 0x040, 0x10, 5, 1),
	PIN_FIELD_BASE(6, 6, 4, 0x040, 0x10, 6, 1),
	PIN_FIELD_BASE(7, 7, 4, 0x040, 0x10, 7, 1),
	PIN_FIELD_BASE(8, 8, 4, 0x040, 0x10, 13, 1),
	PIN_FIELD_BASE(9, 9, 4, 0x040, 0x10, 8, 1),
	PIN_FIELD_BASE(10, 10, 4, 0x040, 0x10, 14, 1),
	PIN_FIELD_BASE(11, 11, 4, 0x040, 0x10, 9, 1),
	PIN_FIELD_BASE(12, 12, 4, 0x040, 0x10, 15, 1),
	PIN_FIELD_BASE(13, 13, 4, 0x040, 0x10, 10, 1),
	PIN_FIELD_BASE(14, 14, 4, 0x040, 0x10, 16, 1),
	PIN_FIELD_BASE(15, 15, 4, 0x040, 0x10, 11, 1),
	PIN_FIELD_BASE(16, 16, 4, 0x040, 0x10, 17, 1),
	PIN_FIELD_BASE(17, 17, 4, 0x040, 0x10, 12, 1),
	PIN_FIELD_BASE(18, 18, 2, 0x040, 0x10, 5, 1),
	PIN_FIELD_BASE(19, 19, 2, 0x040, 0x10, 12, 1),
	PIN_FIELD_BASE(20, 20, 2, 0x040, 0x10, 11, 1),
	PIN_FIELD_BASE(21, 21, 2, 0x040, 0x10, 10, 1),
	PIN_FIELD_BASE(22, 22, 2, 0x040, 0x10, 0, 1),
	PIN_FIELD_BASE(23, 23, 2, 0x040, 0x10, 1, 1),
	PIN_FIELD_BASE(24, 24, 2, 0x040, 0x10, 2, 1),
	PIN_FIELD_BASE(25, 25, 2, 0x040, 0x10, 4, 1),
	PIN_FIELD_BASE(26, 26, 2, 0x040, 0x10, 3, 1),
	PIN_FIELD_BASE(27, 27, 2, 0x040, 0x10, 6, 1),
	PIN_FIELD_BASE(28, 28, 2, 0x040, 0x10, 7, 1),
	PIN_FIELD_BASE(29, 29, 2, 0x040, 0x10, 8, 1),
	PIN_FIELD_BASE(30, 30, 2, 0x040, 0x10, 9, 1),
	PIN_FIELD_BASE(31, 31, 1, 0x060, 0x10, 13, 1),
	PIN_FIELD_BASE(32, 32, 1, 0x060, 0x10, 12, 1),
	PIN_FIELD_BASE(33, 33, 1, 0x060, 0x10, 11, 1),
	PIN_FIELD_BASE(34, 34, 1, 0x060, 0x10, 14, 1),
	PIN_FIELD_BASE(35, 35, 1, 0x060, 0x10, 15, 1),
	PIN_FIELD_BASE(36, 36, 1, 0x070, 0x10, 3, 1),
	PIN_FIELD_BASE(37, 37, 1, 0x070, 0x10, 6, 1),
	PIN_FIELD_BASE(38, 38, 1, 0x070, 0x10, 4, 1),
	PIN_FIELD_BASE(39, 39, 1, 0x070, 0x10, 5, 1),
	PIN_FIELD_BASE(40, 40, 1, 0x070, 0x10, 8, 1),
	PIN_FIELD_BASE(41, 41, 1, 0x070, 0x10, 7, 1),
	PIN_FIELD_BASE(42, 42, 1, 0x070, 0x10, 10, 1),
	PIN_FIELD_BASE(43, 43, 1, 0x070, 0x10, 9, 1),
	PIN_FIELD_BASE(44, 44, 1, 0x070, 0x10, 20, 1),
	PIN_FIELD_BASE(45, 45,