path: root/drivers/power/supply/rt9467-charger.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2022 Richtek Technology Corp.
 *
 * Author: ChiYuan Huang <cy_huang@richtek.com>
 *         ChiaEn Wu <chiaen_wu@richtek.com>
 */

#include <linux/bits.h>
#include <linux/bitfield.h>
#include <linux/completion.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/kstrtox.h>
#include <linux/linear_range.h>
#include <linux/module.h>
#include <linux/mod_devicetable.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/power_supply.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/units.h>
#include <linux/sysfs.h>

#define RT9467_REG_CORE_CTRL0		0x00
#define RT9467_REG_CHG_CTRL1		0x01
#define RT9467_REG_CHG_CTRL2		0x02
#define RT9467_REG_CHG_CTRL3		0x03
#define RT9467_REG_CHG_CTRL4		0x04
#define RT9467_REG_CHG_CTRL5		0x05
#define RT9467_REG_CHG_CTRL6		0x06
#define RT9467_REG_CHG_CTRL7		0x07
#define RT9467_REG_CHG_CTRL8		0x08
#define RT9467_REG_CHG_CTRL9		0x09
#define RT9467_REG_CHG_CTRL10		0x0A
#define RT9467_REG_CHG_CTRL12		0x0C
#define RT9467_REG_CHG_CTRL13		0x0D
#define RT9467_REG_CHG_CTRL14		0x0E
#define RT9467_REG_CHG_ADC		0x11
#define RT9467_REG_CHG_DPDM1		0x12
#define RT9467_REG_CHG_DPDM2		0x13
#define RT9467_REG_DEVICE_ID		0x40
#define RT9467_REG_CHG_STAT		0x42
#define RT9467_REG_ADC_DATA_H		0x44
#define RT9467_REG_CHG_STATC		0x50
#define RT9467_REG_CHG_IRQ1		0x53
#define RT9467_REG_CHG_STATC_CTRL	0x60
#define RT9467_REG_CHG_IRQ1_CTRL	0x63

#define RT9467_MASK_PWR_RDY		BIT(7)
#define RT9467_MASK_MIVR_STAT		BIT(6)
#define RT9467_MASK_OTG_CSEL		GENMASK(2, 0)
#define RT9467_MASK_OTG_VSEL		GENMASK(7, 2)
#define RT9467_MASK_OTG_EN		BIT(0)
#define RT9467_MASK_ADC_IN_SEL		GENMASK(7, 4)
#define RT9467_MASK_ADC_START		BIT(0)

#define RT9467_NUM_IRQ_REGS		4
#define RT9467_ICHG_MIN_uA		100000
#define RT9467_ICHG_MAX_uA		5000000
#define RT9467_CV_MAX_uV		4710000
#define RT9467_OTG_MIN_uV		4425000
#define RT9467_OTG_MAX_uV		5825000
#define RT9467_OTG_STEP_uV		25000
#define RT9467_NUM_VOTG			(RT9467_OTG_MAX_uV - RT9467_OTG_MIN_uV + 1)
#define RT9467_AICLVTH_GAP_uV		200000
#define RT9467_ADCCONV_TIME_MS		35

#define RT9466_VID			0x8
#define RT9467_VID			0x9

/* IRQ number */
#define RT9467_IRQ_TS_STATC	0
#define RT9467_IRQ_CHG_FAULT	1
#define RT9467_IRQ_CHG_STATC	2
#define RT9467_IRQ_CHG_TMR	3
#define RT9467_IRQ_CHG_BATABS	4
#define RT9467_IRQ_CHG_ADPBAD	5
#define RT9467_IRQ_CHG_RVP	6
#define RT9467_IRQ_OTP		7

#define RT9467_IRQ_CHG_AICLM	8
#define RT9467_IRQ_CHG_ICHGM	9
#define RT9467_IRQ_WDTMR	11
#define RT9467_IRQ_SSFINISH	12
#define RT9467_IRQ_CHG_RECHG	13
#define RT9467_IRQ_CHG_TERM	14
#define RT9467_IRQ_CHG_IEOC	15

#define RT9467_IRQ_ADC_DONE	16
#define RT9467_IRQ_PUMPX_DONE	17
#define RT9467_IRQ_BST_BATUV	21
#define RT9467_IRQ_BST_MIDOV	22
#define RT9467_IRQ_BST_OLP	23

#define RT9467_IRQ_ATTACH	24
#define RT9467_IRQ_DETACH	25
#define RT9467_IRQ_HVDCP_DET	29
#define RT9467_IRQ_CHGDET	30
#define RT9467_IRQ_DCDT		31

enum rt9467_fields {
	/* RT9467_REG_CORE_CTRL0 */
	F_RST = 0,
	/* RT9467_REG_CHG_CTRL1 */
	F_HZ, F_OTG_PIN_EN, F_OPA_MODE,
	/* RT9467_REG_CHG_CTRL2 */
	F_SHIP_MODE, F_TE, F_IINLMTSEL, F_CFO_EN, F_CHG_EN,
	/* RT9467_REG_CHG_CTRL3 */
	F_IAICR, F_ILIM_EN,
	/* RT9467_REG_CHG_CTRL4 */
	F_VOREG,
	/* RT9467_REG_CHG_CTRL6 */
	F_VMIVR,
	/* RT9467_REG_CHG_CTRL7 */
	F_ICHG,
	/* RT9467_REG_CHG_CTRL8 */
	F_IPREC,
	/* RT9467_REG_CHG_CTRL9 */
	F_IEOC,
	/* RT9467_REG_CHG_CTRL12 */
	F_WT_FC,
	/* RT9467_REG_CHG_CTRL13 */
	F_OCP,
	/* RT9467_REG_CHG_CTRL14 */
	F_AICL_MEAS, F_AICL_VTH,
	/* RT9467_REG_CHG_DPDM1 */
	F_USBCHGEN,
	/* RT9467_REG_CHG_DPDM2 */
	F_USB_STATUS,
	/* RT9467_REG_DEVICE_ID */
	F_VENDOR,
	/* RT9467_REG_CHG_STAT */
	F_CHG_STAT,
	/* RT9467_REG_CHG_STATC */
	F_PWR_RDY, F_CHG_MIVR,
	F_MAX_FIELDS
};

static const struct regmap_irq rt9467_irqs[] = {
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_TS_STATC, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_FAULT, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_STATC, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TMR, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_BATABS, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ADPBAD, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RVP, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_OTP, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_AICLM, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_ICHGM, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_WDTMR, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_SSFINISH, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_RECHG, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_TERM, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_CHG_IEOC, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_ADC_DONE, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_PUMPX_DONE, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_BATUV, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_MIDOV, 8),
	REGMAP_IRQ_REG_LINE(RT9467_IRQ_BST_OLP,<