path: root/drivers/thunderbolt/tb.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Thunderbolt driver - bus logic (NHI independent)
 *
 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
 * Copyright (C) 2018, Intel Corporation
 */

#ifndef TB_H_
#define TB_H_

#include <linux/nvmem-provider.h>
#include <linux/pci.h>
#include <linux/thunderbolt.h>
#include <linux/uuid.h>
#include <linux/bitfield.h>

#include "tb_regs.h"
#include "ctl.h"
#include "dma_port.h"

#define NVM_MIN_SIZE		SZ_32K
#define NVM_MAX_SIZE		SZ_512K
#define NVM_DATA_DWORDS		16

/* Keep link controller awake during update */
#define QUIRK_FORCE_POWER_LINK_CONTROLLER		BIT(0)
/* Disable CLx if not supported */
#define QUIRK_NO_CLX					BIT(1)

/**
 * struct tb_nvm - Structure holding NVM information
 * @dev: Owner of the NVM
 * @major: Major version number of the active NVM portion
 * @minor: Minor version number of the active NVM portion
 * @id: Identifier used with both NVM portions
 * @active: Active portion NVMem device
 * @active_size: Size in bytes of the active NVM
 * @non_active: Non-active portion NVMem device
 * @buf: Buffer where the NVM image is stored before it is written to
 *	 the actual NVM flash device
 * @buf_data_start: Where the actual image starts after skipping
 *		    possible headers
 * @buf_data_size: Number of bytes actually consumed by the new NVM
 *		   image
 * @authenticating: The device is authenticating the new NVM
 * @flushed: The image has been flushed to the storage area
 * @vops: Router vendor specific NVM operations (optional)
 *
 * The user of this structure needs to handle serialization of possible
 * concurrent access.
 */
struct tb_nvm {
	struct device *dev;
	u32 major;
	u32 minor;
	int id;
	struct nvmem_device *active;
	size_t active_size;
	struct nvmem_device *non_active;
	void *buf;
	void *buf_data_start;
	size_t buf_data_size;
	bool authenticating;
	bool flushed;
	const struct tb_nvm_vendor_ops *vops;
};

enum tb_nvm_write_ops {
	WRITE_AND_AUTHENTICATE = 1,
	WRITE_ONLY = 2,
	AUTHENTICATE_ONLY = 3,
};

#define TB_SWITCH_KEY_SIZE		32
#define TB_SWITCH_MAX_DEPTH		6
#define USB4_SWITCH_MAX_DEPTH		5

/**
 * enum tb_switch_tmu_rate - TMU refresh rate
 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
 *			     transmission of the Delay Request TSNOS
 *			     (Time Sync Notification Ordered Set) on a Link
 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
 *			       transmission of the Delay Request TSNOS on
 *			       a Link
 */
enum tb_switch_tmu_rate {
	TB_SWITCH_TMU_RATE_OFF = 0,
	TB_SWITCH_TMU_RATE_HIFI = 16,
	TB_SWITCH_TMU_RATE_NORMAL = 1000,
};

/**
 * struct tb_switch_tmu - Structure holding switch TMU configuration
 * @cap: Offset to the TMU capability (%0 if not found)
 * @has_ucap: Does the switch support uni-directional mode
 * @rate: TMU refresh rate related to upstream switch. In case of root
 *	  switch this holds the domain rate. Reflects the HW setting.
 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
 *		    related to upstream switch. Don't care for root switch.
 *		    Reflects the HW setting.
 * @unidirectional_request: Is the new TMU mode: uni-directional or bi-directional
 *			    that is requested to be set. Related to upstream switch.
 *			    Don't care for root switch.
 * @rate_request: TMU new refresh rate related to upstream switch that is
 *		  requested to be set. In case of root switch, this holds
 *		  the new domain rate that is requested to be set.
 */
struct tb_switch_tmu {
	int cap;
	bool has_ucap;
	enum tb_switch_tmu_rate rate;
	bool unidirectional;
	bool unidirectional_request;
	enum tb_switch_tmu_rate rate_request;
};

enum tb_clx {
	TB_CLX_DISABLE,
	/* CL0s and CL1 are enabled and supported together */
	TB_CL1 = BIT(0),
	TB_CL2 = BIT(1),
};

/**
 * struct tb_switch - a thunderbolt switch
 * @dev: Device for the switch
 * @config: Switch configuration
 * @ports: Ports in this switch
 * @dma_port: If the switch has port supporting DMA configuration based
 *	      mailbox this will hold the pointer to that (%NULL
 *	      otherwise). If set it also means the switch has
 *	      upgradeable NVM.
 * @tmu: The switch TMU configuration
 * @tb: Pointer to