path: root/include/linux/mfd/rk808.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Register definitions for Rockchip's RK808/RK818 PMIC
 *
 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
 *
 * Author: Chris Zhong <zyw@rock-chips.com>
 * Author: Zhang Qing <zhangqing@rock-chips.com>
 *
 * Copyright (C) 2016 PHYTEC Messtechnik GmbH
 *
 * Author: Wadim Egorov <w.egorov@phytec.de>
 */

#ifndef __LINUX_REGULATOR_RK808_H
#define __LINUX_REGULATOR_RK808_H

#include <linux/regulator/machine.h>
#include <linux/regmap.h>

/*
 * rk808 Global Register Map.
 */

#define RK808_DCDC1	0 /* (0+RK808_START) */
#define RK808_LDO1	4 /* (4+RK808_START) */
#define RK808_NUM_REGULATORS	14

enum rk808_reg {
	RK808_ID_DCDC1,
	RK808_ID_DCDC2,
	RK808_ID_DCDC3,
	RK808_ID_DCDC4,
	RK808_ID_LDO1,
	RK808_ID_LDO2,
	RK808_ID_LDO3,
	RK808_ID_LDO4,
	RK808_ID_LDO5,
	RK808_ID_LDO6,
	RK808_ID_LDO7,
	RK808_ID_LDO8,
	RK808_ID_SWITCH1,
	RK808_ID_SWITCH2,
};

#define RK808_SECONDS_REG	0x00
#define RK808_MINUTES_REG	0x01
#define RK808_HOURS_REG		0x02
#define RK808_DAYS_REG		0x03
#define RK808_MONTHS_REG	0x04
#define RK808_YEARS_REG		0x05
#define RK808_WEEKS_REG		0x06
#define RK808_ALARM_SECONDS_REG	0x08
#define RK808_ALARM_MINUTES_REG	0x09
#define RK808_ALARM_HOURS_REG	0x0a
#define RK808_ALARM_DAYS_REG	0x0b
#define RK808_ALARM_MONTHS_REG	0x0c
#define RK808_ALARM_YEARS_REG	0x0d
#define RK808_RTC_CTRL_REG	0x10
#define RK808_RTC_STATUS_REG	0x11
#define RK808_RTC_INT_REG	0x12
#define RK808_RTC_COMP_LSB_REG	0x13
#define RK808_RTC_COMP_MSB_REG	0x14
#define RK808_ID_MSB		0x17
#define RK808_ID_LSB		0x18
#define RK808_CLK32OUT_REG	0x20
#define RK808_VB_MON_REG	0x21
#define RK808_THERMAL_REG	0x22
#define RK808_DCDC_EN_REG	0x23
#define RK808_LDO_EN_REG	0x24
#define RK808_SLEEP_SET_OFF_REG1	0x25
#define RK808_SLEEP_SET_OFF_REG2	0x26
#define RK808_DCDC_UV_STS_REG	0x27
#define RK808_DCDC_UV_ACT_REG	0x28
#define RK808_LDO_UV_STS_REG	0x29
#define RK808_LDO_UV_ACT_REG	0x2a
#define RK808_DCDC_PG_REG	0x2b
#define RK808_LDO_PG_REG	0x2c
#define RK808_VOUT_MON_TDB_REG	0x2d
#define RK808_BUCK1_CONFIG_REG		0x2e
#define RK808_BUCK1_ON_VSEL_REG		0x2f
#define RK808_BUCK1_SLP_VSEL_REG	0x30
#define RK808_BUCK1_DVS_VSEL_REG	0x31
#define RK808_BUCK2_CONFIG_REG		0x32
#define RK808_BUCK2_ON_VSEL_REG		0x33
#define RK808_BUCK2_SLP_VSEL_REG	0x34
#define RK808_BUCK2_DVS_VSEL_REG	0x35
#define RK808_BUCK3_CONFIG_REG		0x36
#define RK808_BUCK4_CONFIG_REG		0x37
#define RK808_BUCK4_ON_VSEL_REG		0x38
#define RK808_BUCK4_SLP_VSEL_REG	0x39
#define RK808_BOOST_CONFIG_REG		0x3a
#define RK808_LDO1_ON_VSEL_REG		0x3b
#define RK808_LDO1_SLP_VSEL_REG		0x3c
#define RK808_LDO2_ON_VSEL_REG		0x3d
#define RK808_LDO2_SLP_VSEL_REG		0x3e
#define RK808_LDO3_ON_VSEL_REG		0x3f
#define RK808_LDO3_SLP_VSEL_REG		0x40
#define RK808_LDO4_ON_VSEL_REG		0x41
#define RK808_LDO4_SLP_VSEL_REG		0x42
#define RK808_LDO5_ON_VSEL_REG		0x43
#define RK808_LDO5_SLP_VSEL_REG		0x44
#define RK808_LDO6_ON_VSEL_REG		0x45
#define RK808_LDO6_SLP_VSEL_REG		0x46
#define RK808_LDO7_ON_VSEL_REG		0x47
#define RK808_LDO7_SLP_VSEL_REG		0x48
#define RK808_LDO8_ON_VSEL_REG		0x49
#define RK808_LDO8_SLP_VSEL_REG		0x4a
#define RK808_DEVCTRL_REG	0x4b
#define RK808_INT_STS_REG1	0x4c
#define RK808_INT_STS_MSK_REG1	0x4d
#define RK808_INT_STS_REG2	0x4e
#define RK808_INT_STS_MSK_REG2	0x4f
#define RK808_IO_POL_REG	0x50

/* RK816 */
enum rk816_reg {
	RK816_ID_DCDC1,
	RK816_ID_DCDC2,
	RK816_ID_DCDC3,
	RK816_ID_DCDC4,
	RK816_ID_LDO1,
	RK816_ID_LDO2,
	RK816_ID_LDO3,
	RK816_ID_LDO4,
	RK816_ID_LDO5,
	RK816_ID_LDO6,
	RK816_ID_BOOST,
	RK816_ID_OTG_SW,
};

enum rk816_irqs {
	/* INT_STS_REG1 */
	RK816_IRQ_PWRON_FALL,
	RK816_IRQ_PWRON_RISE,

	/* INT_STS_REG2 */
	RK816_IRQ_VB_LOW,
	RK816_IRQ_PWRON,
	RK816_IRQ_PWRON_LP,
	RK816_IRQ_HOTDIE,
	RK816_IRQ_RTC_ALARM,
	RK816_IRQ_RTC_PERIOD,
	RK816_IRQ_USB_OV,

	/* INT_STS_REG3 */
	RK816_IRQ_PLUG_IN,
	RK816_IRQ_PLUG_OUT,
	RK816_IRQ_CHG_OK,
	RK816_IRQ_CHG_TE,
	RK816_IRQ_CHG_TS,
	RK816_IRQ_CHG_CVTLIM,
	RK816_IRQ_DISCHG_ILIM,
};

/* power channel registers */
#define RK816_DCDC_EN_REG1		0x23

#define RK816_DCDC_EN_REG2		0x24
#define	RK816_BOOST_EN			BIT(1)
#define RK816_OTG_EN			BIT(2)
#define	RK816_BOOST_EN_MSK		BIT(5)
#define RK816_OTG_EN_MSK		BIT(6)
#define RK816_BUCK_DVS_CONFIRM		BIT(7)

#define RK816_LDO_EN_REG1		0x27

#define RK816_LDO_EN_REG2		0x28

/* interrupt registers and irq definitions */
#define RK816_INT_STS_REG1		0x49
#define RK816_INT_STS_MSK_REG1		0x4a
#define RK816_INT_STS_PWRON_FALL	BIT(5)
#define RK816_INT_STS_PWRON_RISE	BIT(6)

#define RK816_INT_STS_REG2		0x4c
#define RK816_INT_STS_MSK_REG2		0x4d
#define RK816_INT_STS_VB_LOW		BIT(1)
#define RK816_INT_STS_PWRON		BIT(2)
#define RK816_INT_STS_PWRON_LP		BIT(3)
#define RK816_INT_STS_HOTDIE		BIT(4)
#define RK816_INT_STS_RTC_ALARM		BIT(5)
#define RK816_INT_STS_RTC_PERIOD	BIT(6)
#define RK816_INT_STS_USB_OV		BIT(7)

#define RK816_INT_STS_REG3		0x4e
#define RK816_INT_STS_MSK_REG3		0x4f
#define RK816_INT_STS_PLUG_IN		BIT(0)
#define RK816_INT_STS_PLUG_OUT		BIT(1)
#define RK816_INT_STS_CHG_OK		BIT(2)
#define RK816_INT_STS_CHG_TE		BIT(3)
#define RK816_INT_STS_CHG_TS		BIT(4)
#define RK816_INT_STS_CHG_CVTLIM	BIT(6)
#define RK816_INT_STS_DISCHG_ILIM	BIT(7)

#define RK816_IRQ_STS_OFFSET(x)		((x) - RK816_INT_STS_REG1)
#define RK816_IRQ_MSK_OFFSET(x)		((x) - RK816_INT_STS_MSK_REG1)

/* charger, boost and OTG registers */
#define RK816_OTG_BUCK_LDO_CONFIG_REG	0x2a
#define RK816_CHRG_CONFIG_REG		0x2b
#define RK816_BOOST_ON_VESL_REG		0x54
#define RK816_BOOST_SLP_VSEL_REG	0x55
#define RK816_CHRG_BOOST_CONFIG_REG	0x9a
#define RK816_SUP_STS_REG		0xa0
#define RK816_USB_CTRL_REG		0xa1
#define RK816_CHRG_CTRL(x)		(0xa3 + (x))
#define RK816_BAT_CTRL_REG		0xa6
#define RK816_BAT_HTS_TS_REG		0xa8
#define RK816_BAT_LTS_TS_REG		0xa9

/* adc and fuel gauge registers */
#define RK816_TS_CTRL_REG		0xac
#define RK816_ADC_CTRL_REG		0xad
#define RK816_GGCON_REG			0xb0
#define RK816_GGSTS_REG			0xb1
#define RK816_ZERO_CUR_ADC_REGH		0xb2
#define RK816_ZERO_CUR_ADC_REGL		0xb3
#define RK816_GASCNT_CAL_REG(x)		(0xb7 - (x))
#define RK816_GASCNT_REG(x)		(0xbb - (x))
#define RK816_BAT_CUR_AVG_REGH		0xbc
#define RK816_BAT_CUR_AVG_REGL		0xbd
#define RK816_TS_ADC_REGH		0xbe
#define RK816_TS_ADC_REGL		0xbf
#define RK816_USB_ADC_REGH		0xc0
#define RK816_USB_ADC_REGL		0xc1
#define RK816_BAT_OCV_REGH		0xc2
#define RK816_BAT_OCV_REGL		0xc3
#define RK816_BAT_VOL_REGH		0xc4
#define RK816_BAT_VOL_REGL		0xc5
#define RK816_RELAX_ENTRY_THRES_REGH	0xc6
#define RK816_RELAX_ENTRY_THRES_REGL	0xc7
#define RK816_RELAX_EXIT_THRES_REGH	0xc8
#define RK816_RELAX_EXIT_THRES_REGL	0xc9
#define RK816_RELAX_VOL1_REGH		0xca
#define RK816_RELAX_VOL1_REGL		0xcb
#define RK816_RELAX_VOL2_REGH		0xcc
#define RK816_RELAX_VOL2_REGL		0xcd
#define RK816_RELAX_CUR1_REGH		0xce
#define RK816_RELAX_CUR1_REGL		0xcf
#define RK816_RELAX_CUR2_REGH		0xd0
#define RK816_RELAX_CUR2_REGL		0xd1
#define RK816_CAL_OFFSET_REGH		0xd2
#define RK816_CAL_OFFSET_REGL		0xd3
#define RK816_NON_ACT_TIMER_CNT_REG	0xd4
#define RK816_VCALIB0_REGH		0xd5
#define RK816_VCALIB0_REGL		0xd6
#define RK816_VCALIB1_REGH		0xd7
#define RK816_VCALIB1_REGL		0xd8
#define RK816_FCC_GASCNT_REG(x)		(0xdc - (x))
#define RK816_IOFFSET_REGH		0xdd
#define RK816_IOFFSET_REGL		0xde
#define RK816_SLEEP_CON_SAMP_CUR_REG	0xdf

/* general purpose data registers 0xe0 ~ 0xf2 */
#define RK816_DATA_REG(x)		(0xe0 + (x))

/* RK818 */
#define RK818_DCDC1			0
#define RK818_LDO1			4
#define RK818_NUM_REGULATORS		17

enum rk818_reg {
	RK818_ID_DCDC1,
	RK818_ID_DCDC2,
	RK818_ID_DCDC3,
	RK818_ID_DCDC4,
	RK818_ID_BOOST,
	RK818_ID_LDO1,
	RK818_ID_LDO2,
	RK818_ID_LDO3,
	RK818_ID_LDO4,
	RK818_ID_LDO5,
	RK818_ID_LDO6,
	RK818_ID_LDO7,
	RK818_ID_LDO8,
	RK818_ID_LDO9,
	RK818_ID_SWITCH,
	RK818_ID_HDMI_SWITCH,
	RK818_ID_OTG_SWITCH,
};

#define RK818_DCDC_EN_REG		0x23
#define RK818_LDO_EN_REG		0x24
#define RK818_SLEEP_SET_OFF_REG1	0x25
#define RK818_SLEEP_SET_OFF_REG2	0x26
#define RK818_DCDC_UV_STS_REG		0x27
#define RK818_DCDC_UV_ACT_REG		0x28
#define RK818_LDO_UV_STS_REG		0x29
#define RK818_LDO_UV_ACT_REG		0x2a
#define RK818_DCDC_PG_REG		0x2b
#define RK818_LDO_PG_REG		0x2c
#define RK818_VOUT_MON_TDB_REG		0x2d
#define RK818_BUCK1_CONFIG_REG		0x2e
#define RK818_BUCK1_ON_VSEL_REG		0x2f
#define RK818_BUCK1_SLP_VSEL_REG	0x30
#define RK818_BUCK2_CONFIG_REG		0x32
#define RK818_BUCK2_ON_VSEL_REG		0x33
#define RK818_BUCK2_SLP_VSEL_REG	0x34
#define RK818_BUCK3_CONFIG_REG		0x36
#define RK818_BUCK4_CONFIG_REG		0x37
#define RK818_BUCK4_ON_VSEL_REG		0x38
#define RK818_BUCK4_SLP_VSEL_REG	0x39
#define RK818_BOOST_CONFIG_REG		0x3a
#define RK818_LDO1_ON_VSEL_REG		0x3b
#define RK818_LDO1_SLP_VSEL_REG		0x3c
#define RK818_LDO2_ON_VSEL_REG		0x3d
#define RK818_LDO2_SLP_VSEL_REG		0x3e
#define RK818_LDO3_ON_VSEL_REG		0x3f
#define RK818_LDO3_SLP_VSEL_REG		0x40
#define RK818_LDO4_ON_VSEL_REG		0x41
#define RK818_LDO4_SLP_VSEL_REG		0x42
#define RK818_LDO5_ON_VSEL_REG		0x43
#define RK818_LDO5_SLP_VSEL_REG		0x44
#define RK818_LDO6_ON_VSEL_REG		0x45
#define RK818_LDO6_SLP_VSEL_REG		0x46
#define RK818_LDO7_ON_VSEL_REG		0x47
#define RK818_LDO7_SLP_VSEL_REG		0x48
#define RK818_LDO8_ON_VSEL_REG		0x49
#define RK818_LDO8_SLP_VSEL_REG		0x4a
#define RK818_BOOST_LDO9_ON_VSEL_REG	0x54
#define RK818_BOOST_LDO9_SLP_VSEL_REG	0x55
#define RK818_DEVCTRL_REG		0x4b
#define RK818_INT_STS_REG1		0X4c
#define RK818_INT_STS_MSK_REG1		0x4d
#define RK818_INT_STS_REG2		0x4e
#define RK818_INT_STS_MSK_REG2		0x4f
#define RK818_IO_POL_REG		0x50
#define RK818_H5V_EN_REG		0x52
#define RK818_SLEEP_SET_OFF_REG3	0x53
#define RK818_BOOST_LDO9_ON_VSEL_REG	0x54
#define RK818_BOOST_LDO9_SLP_VSEL_REG	0x55
#define RK818_BOOST_CTRL_REG		0x56
#define RK818_DCDC_ILMAX		0x90
#define RK818_USB_CTRL_REG		0xa1

#define RK818_H5V_EN			BIT(0)
#define RK818_REF_RDY_CTRL		BIT(1)
#define RK818_USB_ILIM_SEL_MASK		0xf
#define RK818_USB_ILMIN_2000MA		0x7
#define RK818_USB_CHG_SD_VSEL_MASK	0x70

/* RK805 */
enum rk805_reg {
	RK805_ID_DCDC1,
	RK805_ID_DCDC2,
	RK805_ID_DCDC3,
	RK805_ID_DCDC4,
	RK805_ID_LDO1,
	RK805_ID_LDO2,
	RK805_ID_LDO3,
};

/* CONFIG REGISTER */
#define RK805_VB_MON_REG		0x21
#define RK805_THERMAL_REG		0x22

/* POWER CHANNELS ENABLE REGISTER */
#define RK805_DCDC_EN_REG		0x23
#define RK805_SLP_DCDC_EN_REG		0x25
#define RK805_SLP_LDO_EN_REG		0x26
#define RK805_LDO_EN_REG		0x27

/* BUCK AND LDO CONFIG REGISTER */
#define RK805_BUCK_LDO_SLP_LP_EN_REG	0x2A
#define RK805_BUCK1_CONFIG_REG		0x2E
#define RK805_BUCK1_ON_VSEL_REG		0x2F
#define RK805_BUCK1_SLP_VSEL_REG	0x30
#define RK805_BUCK2_CONFIG_REG		0x32
#define RK805_BUCK2_ON_VSEL_REG		0x33
#define RK805_BUCK2_SLP_VSEL_REG	0x34
#define RK805_BUCK3_CONFIG_REG		0x36
#define RK805_BUCK4_CONFIG_REG		0x37
#define RK805_BUCK4_ON_VSEL_REG		0x38
#define RK805_BUCK4_SLP_VSEL_REG	0x39
#define RK805_LDO1_ON_VSEL_REG		0x3B
#define RK805_LDO1_SLP_VSEL_REG		0x3C
#define RK805_LDO2_ON_VSEL_REG		0x3D
#define RK805_LDO2_SLP_VSEL_REG		0x3E
#define RK805_LDO3_ON_VSEL_REG		0x3F
#define RK805_LDO3_SLP_VSEL_REG		0x40

/* INTERRUPT REGISTER */
#define RK805_PWRON_LP_INT_TIME_REG	0x47
#define RK805_PWRON_DB_REG		0x48
#define RK805_DEV_CTRL_REG		0x4B
#define RK805_INT_STS_REG		0x4C
#define RK805_INT_STS_MSK_REG		0x4D
#define RK805_GPIO_IO_POL_REG		0x50
#define RK805_OUT_REG			0x52
#define RK805_ON_SOURCE_REG		0xAE
#define RK805_OFF_SOURCE_REG		0xAF

#define RK805_NUM_REGULATORS		7

#define RK805_PWRON_FALL_RISE_INT_EN	0x0
#define RK805_PWRON_FALL_RISE_INT_MSK	0x81

/* RK805 IRQ Definitions */
#define RK805_IRQ_PWRON_RISE		0
#define RK805_IRQ_VB_LOW		1
#define RK805_IRQ_PWRON			2
#define RK805_IRQ_PWRON_LP		3
#define RK805_IRQ_HOTDIE		4
#define RK805_IRQ_RTC_ALARM		5
#define RK805_IRQ_RTC_PERIOD		6
#define RK805_IRQ_PWRON_FALL		7

#define RK805_IRQ_PWRON_RISE_MSK	BIT(0)
#define RK805_IRQ_VB_LOW_MSK		BIT(1)
#define RK805_IRQ_PWRON_MSK		BIT(2)
#define RK805_IRQ_PWRON_LP_MSK		BIT(3)
#define RK805_IRQ_HOTDIE_MSK		BIT(4)
#define RK805_IRQ_RTC_ALARM_MSK		BIT(5)
#define RK805_IRQ_RTC_PERIOD_MSK	BIT(6)
#define RK805_IRQ_PWRON_FALL_MSK	BIT(7)

#define RK805_PWR_RISE_INT_STATUS	BIT(0)
#define RK805_VB_LOW_INT_STATUS		BIT(1)
#define RK805_PWRON_INT_STATUS		BIT(2)
#define RK805_PWRON_LP_INT_STATUS	BIT(3)
#define RK805_HOTDIE_INT_STATUS		BIT(4)
#define RK805_ALARM_INT_STATUS		BIT(5)
#define RK805_PERIOD_INT_STATUS		BIT(6)
#define RK805_PWR_FALL_INT_STATUS	BIT(7)

#define RK805_BUCK1_2_ILMAX_MASK	(3 << 6)
#define RK805_BUCK3_4_ILMAX_MASK        (3 << 3)
#define RK805_RTC_PERIOD_INT_MASK	(1 << 6)
#define RK805_RTC_ALARM_INT_MASK	(1 << 5)
#define RK805_INT_ALARM_EN		(1 << 3)
#define RK805_INT_TIMER_EN		(1 << 2)

/* RK806 */
#define RK806_POWER_EN0			0x0
#define RK806_POWER_EN1			0x1
#define RK806_POWER_EN2			0x2
#define RK806_POWER_EN3			0x3
#define RK806_POWER_EN4			0x4
#define RK806_POWER_EN5			0x5
#define RK806_POWER_SLP_EN0		0x6
#define RK806_POWER_SLP_EN1		0x7
#define RK806_POWER_SLP_EN2		0x8
#define RK806_POWER_DISCHRG_EN0		0x9
#define RK806_POWER_DISCHRG_EN1		0xA
#define RK806_POWER_DISCHRG_EN2		0xB
#define RK806_BUCK_FB_CONFIG		0xC
#define RK806_SLP_LP_CONFIG		0xD
#define RK806_POWER_FPWM_EN0		0xE
#define RK806_POWER_FPWM_EN1		0xF
#define RK806_BUCK1_CONFIG		0x10
#define RK806_BUCK2_CONFIG		0x11
#define RK806_BUCK3_CONFIG		0x12
#define RK806_BUCK4_CONFIG		0x13
#define RK806_BUCK5_CONFIG		0x14
#define RK806_BUCK6_CONFIG		0x15
#define RK806_BUCK7_CONFIG		0x16
#define RK806_BUCK8_CONFIG		0x17
#define RK806_BUCK9_CONFIG		0x18
#define RK806_BUCK10_CONFIG		0x19
#define RK806_BUCK1_ON_VSEL		0x1A
#define RK806_BUCK2_ON_VSEL		0x1B
#define RK806_BUCK3_ON_VSEL		0x1C
#define RK806_BUCK4_ON_VSEL		0x1D
#define RK806_BUCK5_ON_VSEL		0x1E
#define RK806_BUCK6_ON_VSEL		0x1F
#define RK806_BUCK7_ON_VSEL		0x20
#define RK806_BUCK8_ON_VSEL		0x21
#define RK806_BUCK9_ON_VSEL		0x22
#define RK806_BUCK10_ON_VSEL		0x23
#define RK806_BUCK1_SLP_VSEL		0x24
#define RK806_BUCK2_SLP_VSEL		0x25
#define RK806_BUCK3_SLP_VSEL		0x26
#define RK806_BUCK4_SLP_VSEL		0x27
#define RK806_BUCK5_SLP_VSEL		0x28
#define RK806_BUCK6_SLP_VSEL		0x29
#define RK806_BUCK7_SLP_VSEL		0x2A
#define RK806_BUCK8_SLP_VSEL		0x2B
#define RK806_BUCK9_SLP_VSEL		0x2D
#define RK806_BUCK10_SLP_VSEL		0x2E
#define RK806_BUCK_DEBUG1		0x30
#define RK806_BUCK_DEBUG2		0x31
#define RK806_BUCK_DEBUG3		0x32
#define RK806_BUCK_DEBUG4		0x33
#define RK806_BUCK_DEBUG5		0x34
#define RK806_BUCK_DEBUG6		0x35
#define RK806_BUCK_DEBUG7