path: root/include/linux/mfd/wm8400-audio.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * wm8400 private definitions for audio
 *
 * Copyright 2008 Wolfson Microelectronics plc
 */

#ifndef __LINUX_MFD_WM8400_AUDIO_H
#define __LINUX_MFD_WM8400_AUDIO_H

#include <linux/mfd/wm8400-audio.h>

/*
 * R2 (0x02) - Power Management (1)
 */
#define WM8400_CODEC_ENA                        0x8000  /* CODEC_ENA */
#define WM8400_CODEC_ENA_MASK                   0x8000  /* CODEC_ENA */
#define WM8400_CODEC_ENA_SHIFT                      15  /* CODEC_ENA */
#define WM8400_CODEC_ENA_WIDTH                       1  /* CODEC_ENA */
#define WM8400_SYSCLK_ENA                       0x4000  /* SYSCLK_ENA */
#define WM8400_SYSCLK_ENA_MASK                  0x4000  /* SYSCLK_ENA */
#define WM8400_SYSCLK_ENA_SHIFT                     14  /* SYSCLK_ENA */
#define WM8400_SYSCLK_ENA_WIDTH                      1  /* SYSCLK_ENA */
#define WM8400_SPK_MIX_ENA                      0x2000  /* SPK_MIX_ENA */
#define WM8400_SPK_MIX_ENA_MASK                 0x2000  /* SPK_MIX_ENA */
#define WM8400_SPK_MIX_ENA_SHIFT                    13  /* SPK_MIX_ENA */
#define WM8400_SPK_MIX_ENA_WIDTH                     1  /* SPK_MIX_ENA */
#define WM8400_SPK_ENA                          0x1000  /* SPK_ENA */
#define WM8400_SPK_ENA_MASK                     0x1000  /* SPK_ENA */
#define WM8400_SPK_ENA_SHIFT                        12  /* SPK_ENA */
#define WM8400_SPK_ENA_WIDTH                         1  /* SPK_ENA */
#define WM8400_OUT3_ENA                         0x0800  /* OUT3_ENA */
#define WM8400_OUT3_ENA_MASK                    0x0800  /* OUT3_ENA */
#define WM8400_OUT3_ENA_SHIFT                       11  /* OUT3_ENA */
#define WM8400_OUT3_ENA_WIDTH                        1  /* OUT3_ENA */
#define WM8400_OUT4_ENA                         0x0400  /* OUT4_ENA */
#define WM8400_OUT4_ENA_MASK                    0x0400  /* OUT4_ENA */
#define WM8400_OUT4_ENA_SHIFT                       10  /* OUT4_ENA */
#define WM8400_OUT4_ENA_WIDTH                        1  /* OUT4_ENA */
#define WM8400_LOUT_ENA                         0x0200  /* LOUT_ENA */
#define WM8400_LOUT_ENA_MASK                    0x0200  /* LOUT_ENA */
#define WM8400_LOUT_ENA_SHIFT                        9  /* LOUT_ENA */
#define WM8400_LOUT_ENA_WIDTH                        1  /* LOUT_ENA */
#define WM8400_ROUT_ENA                         0x0100  /* ROUT_ENA */
#define WM8400_ROUT_ENA_MASK                    0x0100  /* ROUT_ENA */
#define WM8400_ROUT_ENA_SHIFT                        8  /* ROUT_ENA */
#define WM8400_ROUT_ENA_WIDTH                        1  /* ROUT_ENA */
#define WM8400_MIC1BIAS_ENA                     0x0010  /* MIC1BIAS_ENA */
#define WM8400_MIC1BIAS_ENA_MASK                0x0010  /* MIC1BIAS_ENA */
#define WM8400_MIC1BIAS_ENA_SHIFT                    4  /* MIC1BIAS_ENA */
#define WM8400_MIC1BIAS_ENA_WIDTH                    1  /* MIC1BIAS_ENA */
#define WM8400_VMID_MODE_MASK                   0x0006  /* VMID_MODE - [2:1] */
#define WM8400_VMID_MODE_SHIFT                       1  /* VMID_MODE - [2:1] */
#define WM8400_VMID_MODE_WIDTH                       2  /* VMID_MODE - [2:1] */
#define WM8400_VREF_ENA                         0x0001  /* VREF_ENA */
#define WM8400_VREF_ENA_MASK                    0x0001  /* VREF_ENA */
#define WM8400_VREF_ENA_SHIFT                        0  /* VREF_ENA */
#define WM8400_VREF_ENA_WIDTH                        1  /* VREF_ENA */

/*
 * R3 (0x03) - Power Management (2)
 */
#define WM8400_FLL_ENA                          0x8000  /* FLL_ENA */
#define WM8400_FLL_ENA_MASK                     0x8000  /* FLL_ENA */
#define WM8400_FLL_ENA_SHIFT                        15  /* FLL_ENA */
#define WM8400_FLL_ENA_WIDTH                         1  /* FLL_ENA */
#define WM8400_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
#define WM8400_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
#define WM8400_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
#define WM8400_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
#define WM8400_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
#define WM8400_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
#define WM8400_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
#define WM8400_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
#define WM8400_OPCLK_ENA                        0x0800  /* OPCLK_ENA */
#define WM8400_OPCLK_ENA_MASK                   0x0800  /* OPCLK_ENA */
#define WM8400_OPCLK_ENA_SHIFT                      11  /* OPCLK_ENA */
#define WM8400_OPCLK_ENA_WIDTH                       1  /* OPCLK_ENA */
#define WM8400_AINL_ENA                         0x0200  /* AINL_ENA */
#define WM8400_AINL_ENA_MASK                    0x0200  /* AINL_ENA */
#define WM8400_AINL_ENA_SHIFT                        9  /* AINL_ENA */
#define WM8400_AINL_ENA_WIDTH                        1  /* AINL_ENA */
#define WM8400_AINR_ENA                         0x0100  /* AINR_ENA */
#define WM8400_AINR_ENA_MASK                    0x0100  /* AINR_ENA */
#define WM8400_AINR_ENA_SHIFT                        8  /* AINR_ENA */
#define WM8400_AINR_ENA_WIDTH                        1  /* AINR_ENA */
#define WM8400_LIN34_ENA                        0x0080  /* LIN34_ENA */
#define WM8400_LIN34_ENA_MASK                   0x0080  /* LIN34_ENA */
#define WM8400_LIN34_ENA_SHIFT                       7  /* LIN34_ENA */
#define WM8400_LIN34_ENA_WIDTH                       1  /* LIN34_ENA */
#define WM8400_LIN12_ENA                        0x0040  /* LIN12_ENA */
#define WM8400_LIN12_ENA_MASK                   0x0040  /* LIN12_ENA */
#define WM8400_LIN12_ENA_SHIFT                       6  /* LIN12_ENA */
#define WM8400_LIN12_ENA_WIDTH                       1  /* LIN12_ENA */
#define WM8400_RIN34_ENA                        0x0020  /* RIN34_ENA */
#define WM8400_RIN34_ENA_MASK                   0x0020  /* RIN34_ENA */
#define WM8400_RIN34_ENA_SHIFT                       5  /* RIN34_ENA */
#define WM8400_RIN34_ENA_WIDTH                       1  /* RIN34_ENA */
#define WM8400_RIN12_ENA                        0x0010  /* RIN12_ENA */
#define WM8400_RIN12_ENA_MASK                   0x0010  /* RIN12_ENA */
#define WM8400_RIN12_ENA_SHIFT                       4  /* RIN12_ENA */
#define WM8400_RIN12_ENA_WIDTH                       1  /* RIN12_ENA */
#define WM8400_ADCL_ENA                         0x0002  /* ADCL_ENA */
#define WM8400_ADCL_ENA_MASK                    0x0002  /* ADCL_ENA */
#define WM8400_ADCL_ENA_SHIFT                        1  /* ADCL_ENA */
#define WM8400_ADCL_ENA_WIDTH                        1  /* ADCL_ENA */
#define WM8400_ADCR_ENA                         0x0001  /* ADCR_ENA */
#define WM8400_ADCR_ENA_MASK                    0x0001  /* ADCR_ENA */
#define WM8400_ADCR_ENA_SHIFT                        0  /* ADCR_ENA */
#define WM8400_ADCR_ENA_WIDTH                        1  /* ADCR_ENA */

/*
 * R4 (0x04) - Power Management (3)
 */
#define WM8400_LON_ENA                          0x2000  /* LON_ENA */
#define WM8400_LON_ENA_MASK                     0x2000  /* LON_ENA */
#define WM8400_LON_ENA_SHIFT                        13  /* LON_ENA */
#define WM8400_LON_ENA_WIDTH                         1  /* LON_ENA */
#define WM8400_LOP_ENA                          0x1000  /* LOP_ENA */
#define WM8400_LOP_ENA_MASK                     0x1000  /* LOP_ENA */
#define WM8400_LOP_ENA_SHIFT                        12  /* LOP_ENA */
#define WM8400_LOP_ENA_WIDTH                         1  /* LOP_ENA */
#define WM8400_RON_ENA                          0x0800  /* RON_ENA */
#define WM8400_RON_ENA_MASK                     0x0800  /* RON_ENA */
#define WM8400_RON_ENA_SHIFT                        11  /* RON_ENA */
#define WM8400_RON_ENA_WIDTH                         1  /* RON_ENA */
#define WM8400_ROP_ENA                          0x0400  /* ROP_ENA */
#define WM8400_ROP_ENA_MASK                     0x0400  /* ROP_ENA */
#define WM8400_ROP_ENA_SHIFT                        10  /* ROP_ENA */
#define WM8400_ROP_ENA_WIDTH                         1  /* ROP_ENA */
#define WM8400_LOPGA_ENA                        0x0080  /* LOPGA_ENA */
#define WM8400_LOPGA_ENA_MASK                   0x0080  /* LOPGA_ENA */
#define WM8400_LOPGA_ENA_SHIFT                       7  /* LOPGA_ENA */
#define WM8400_LOPGA_ENA_WIDTH                       1  /* LOPGA_ENA */
#define WM8400_ROPGA_ENA                        0x0040  /* ROPGA_ENA */
#define WM8400_ROPGA_ENA_MASK                   0x0040  /* ROPGA_ENA */
#define WM8400_ROPGA_ENA_SHIFT                       6  /* ROPGA_ENA */
#define WM8400_ROPGA_ENA_WIDTH                       1  /* ROPGA_ENA */
#define WM8400_LOMIX_ENA                        0x0020  /* LOMIX_ENA */
#define WM8400_LOMIX_ENA_MASK                   0x0020  /* LOMIX_ENA */
#define WM8400_LOMIX_ENA_SHIFT                       5  /* LOMIX_ENA */
#define WM8400_LOMIX_ENA_WIDTH                       1  /* LOMIX_ENA */
#define WM8400_ROMIX_ENA                        0x0010  /* ROMIX_ENA */
#define WM8400_ROMIX_ENA_MASK                   0x0010  /* ROMIX_ENA */
#define WM8400_ROMIX_ENA_SHIFT                       4  /* ROMIX_ENA */
#define WM8400_ROMIX_ENA_WIDTH                       1  /* ROMIX_ENA */
#define WM8400_DACL_ENA                         0x0002  /* DACL_ENA */
#define WM8400_DACL_ENA_MASK                    0x0002  /* DACL_ENA */
#define WM8400_DACL_ENA_SHIFT                        1  /* DACL_ENA */
#define WM8400_DACL_ENA_WIDTH                        1  /* DACL_ENA */
#define WM8400_DACR_ENA                         0x0001  /* DACR_ENA */
#define WM8400_DACR_ENA_MASK                    0x0001  /* DACR_ENA */
#define WM8400_DACR_ENA_SHIFT                        0  /* DACR_ENA */
#define WM8400_DACR_ENA_WIDTH                        1  /* DACR_ENA */

/*
 * R5 (0x05) - Audio Interface (1)
 */
#define WM8400_AIFADCL_SRC                      0x8000  /* AIFADCL_SRC */
#define WM8400_AIFADCL_SRC_MASK                 0x8000  /* AIFADCL_SRC */
#define WM8400_AIFADCL_SRC_SHIFT                    15  /* AIFADCL_SRC */
#define WM8400_AIFADCL_SRC_WIDTH                     1  /* AIFADCL_SRC */
#define WM8400_AIFADCR_SRC                      0x4000  /* AIFADCR_SRC */
#define WM8400_AIFADCR_SRC_MASK                 0x4000  /* AIFADCR_SRC */
#define WM8400_AIFADCR_SRC_SHIFT                    14  /* AIFADCR_SRC */
#define WM8400_AIFADCR_SRC_WIDTH                     1  /* AIFADCR_SRC */
#define WM8400_AIFADC_TDM                       0x2000  /* AIFADC_TDM */
#define WM8400_AIFADC_TDM_MASK                  0x2000  /* AIFADC_TDM */
#define WM8400_AIFADC_TDM_SHIFT                     13  /* AIFADC_TDM */
#define WM8400_AIFADC_TDM_WIDTH                      1  /* AIFADC_TDM */
#define WM8400_AIFADC_TDM_CHAN                  0x1000  /* AIFADC_TDM_CHAN */
#define WM8400_AIFADC_TDM_CHAN_MASK             0x1000  /* AIFADC_TDM_CHAN */
#define WM8400_AIFADC_TDM_CHAN_SHIFT                12  /* AIFADC_TDM_CHAN */
#define WM8400_AIFADC_TDM_CHAN_WIDTH                 1  /* AIFADC_TDM_CHAN */
#define WM8400_AIF_BCLK_INV                     0x0100  /* AIF_BCLK_INV */
#define WM8400_AIF_BCLK_INV_MASK                0x0100  /* AIF_BCLK_INV */
#define WM8400_AIF_BCLK_INV_SHIFT                    8  /* AIF_BCLK_INV */
#define WM8400_AIF_BCLK_INV_WIDTH                    1  /* AIF_BCLK_INV */
#define WM8400_AIF_LRCLK_INV                    0x0080  /* AIF_LRCLK_INV */
#define WM8400_AIF_LRCLK_INV_MASK               0x0080  /* AIF_LRCLK_INV */
#define WM8400_AIF_LRCLK_INV_SHIFT                   7  /* AIF_LRCLK_INV */
#define WM8400_AIF_LRCLK_INV_WIDTH                   1  /* AIF_LRCLK_INV */
#define WM8400_AIF_WL_MASK                      0x0060  /* AIF_WL - [6:5] */
#define WM8400_AIF_WL_SHIFT                          5  /* AIF_WL - [6:5] */
#define WM8400_AIF_WL_WIDTH                          2  /* AIF_WL - [6:5] */
#define WM8400_AIF_WL_16BITS			(0 << 5)
#define WM8400_AIF_WL_20BITS			(1 << 5)
#define WM8400_AIF_WL_24BITS			(2 << 5)
#define WM8400_AIF_WL_32BITS			(3 << 5)
#define WM8400_AIF_FMT_MASK                     0x0018  /* AIF_FMT - [4:3] */
#define WM8400_AIF_FMT_SHIFT                         3  /* AIF_FMT - [4:3] */
#define WM8400_AIF_FMT_WIDTH                         2  /* AIF_FMT - [4:3] */
#define WM8400_AIF_FMT_RIGHTJ			(0 << 3)
#define WM8400_AIF_FMT_LEFTJ			(1 << 3)
#define WM8400_AIF_FMT_I2S			(2 << 3)
#define WM8400_AIF_FMT_DSP			(3 << 3)

/*
 * R6 (0x06) - Audio Interface (2)
 */
#define WM8400_DACL_SRC                         0x8000  /* DACL_SRC */
#define WM8400_DACL_SRC_MASK                    0x8000  /* DACL_SRC */
#define WM8400_DACL_SRC_SHIFT                       15  /* DACL_SRC */
#define WM8400_DACL_SRC_WIDTH                        1  /* DACL_SRC */
#define WM8400_DACR_SRC                         0x4000  /* DACR_SRC */
#define WM8400_DACR_SRC_MASK                    0x4000  /* DACR_SRC */
#define WM8400_DACR_SRC_SHIFT                       14  /* DACR_SRC */
#define WM8400_DACR_SRC_WIDTH                        1  /* DACR_SRC */
#define WM8400_AIFDAC_TDM                       0x2000  /* AIFDAC_TDM */
#define WM8400_AIFDAC_TDM_MASK                  0x2000  /* AIFDAC_TDM */
#define WM8400_AIFDAC_TDM_SHIFT                     13  /* AIFDAC_TDM */
#define WM8400_AIFDAC_TDM_WIDTH                      1  /* AIFDAC_TDM */
#define WM8400_AIFDAC_TDM_CHAN                  0x1000  /* AIFDAC_TDM_CHAN */
#define WM8400_AIFDAC_TDM_CHAN_MASK             0x1000  /* AIFDAC_TDM_CHAN */
#define WM8400_AIFDAC_TDM_CHAN_SHIFT                12  /* AIFDAC_TDM_CHAN */
#define WM8400_AIFDAC_TDM_CHAN_WIDTH                 1  /* AIFDAC_TDM_CHAN */
#define WM8400_DAC_BOOST_MASK                   0x0C00  /* DAC_BOOST - [11:10] */
#define WM8400_DAC_BOOST_SHIFT                      10  /* DAC_BOOST - [11:10] */
#define WM8400_DAC_BOOST_WIDTH                       2  /* DAC_BOOST - [11:10] */
#define WM8400_DAC_COMP                         0x0010  /* DAC_COMP */
#define WM8400_DAC_COMP_MASK                    0x0010  /* DAC_COMP */
#define WM8400_DAC_COMP_SHIFT                        4  /* DAC_COMP */
#define WM8400_DAC_COMP_WIDTH                        1  /* DAC_COMP */
#define WM8400_DAC_COMPMODE                     0x0008  /* DAC_COMPMODE */
#define WM8400_DAC_COMPMODE_MASK                0x0008  /* DAC_COMPMODE */
#define WM8400_DAC_COMPMODE_SHIFT                    3  /* DAC_COMPMODE */
#define WM8400_DAC_COMPMODE_WIDTH                    1  /* DAC_COMPMODE */
#define WM8400_ADC_COMP                         0x0004  /* ADC_COMP */
#define WM8400_ADC_COMP_MASK                    0x0004  /* ADC_COMP */
#define WM8400_ADC_COMP_SHIFT                        2  /* ADC_COMP */
#define WM8400_ADC_COMP_WIDTH                        1  /* ADC_COMP */
#define WM8400_ADC_COMPMODE                     0x0002  /* ADC_COMPMODE */
#define WM8400_ADC_COMPMODE_MASK                0x0002  /* ADC_COMPMODE */
#define WM8400_ADC_COMPMODE_SHIFT                    1  /* ADC_COMPMODE */
#define WM8400_ADC_COMPMODE_WIDTH                    1  /* ADC_COMPMODE */
#define WM8400_LOOPBACK                         0x0001  /* LOOPBACK */
#define WM8400_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
#define WM8400_LOOPBACK_SHIFT                        0  /* LOOPBACK */
#define WM8400_LOOPBACK_WIDTH                        1  /* LOOPBACK */

/*
 * R7 (0x07) - Clocking (1)
 */
#define WM8400_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
#define WM8400_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
#define WM8400_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
#define WM8400_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
#define WM8400_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
#define WM8400_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
#define WM8400_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
#define WM8400_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
#define WM8400_OPCLKDIV_MASK                    0x1E00  /* OPCLKDIV - [12:9] */
#define WM8400_OPCLKDIV_SHIFT                        9  /* OPCLKDIV - [12:9] */
#define WM8400_OPCLKDIV_WIDTH                        4  /* OPCLKDIV - [12:9] */
#define WM8400_DCLKDIV_MASK                     0x01C0  /* DCLKDIV - [8:6] */
#define WM8400_DCLKDIV_SHIFT                         6  /* DCLKDIV - [8:6] */
#define WM8400_DCLKDIV_WIDTH                         3  /* DCLKDIV - [8:6] */
#define WM8400_BCLK_DIV_MASK                    0x001E  /* BCLK_DIV - [4:1] */
#define WM8400_BCLK_DIV_SHIFT                        1  /* BCLK_DIV - [4:1] */
#define WM8400_BCLK_DIV_WIDTH                        4  /* BCLK_DIV - [4:1] */

/*
 * R8 (0x08) - Clocking (2)
 */
#define WM8400_MCLK_SRC                         0x8000  /* MCLK_SRC */
#define WM8400_MCLK_SRC_MASK                    0x8000  /* MCLK_SRC */
#define WM8400_MCLK_SRC_SHIFT                       15  /* MCLK_SRC */
#define WM8400_MCLK_SRC_WIDTH                        1  /* MCLK_SRC */
#define WM8400_SYSCLK_SRC                       0x4000  /* SYSCLK_SRC */
#define WM8400_SYSCLK_SRC_MASK                  0x4000  /* SYSCLK_SRC */
#define WM8400_SYSCLK_SRC_SHIFT                     14  /* SYSCLK_SRC */
#define WM8400_SYSCLK_SRC_WIDTH                      1  /* SYSCLK_SRC */
#define WM8400_CLK_FORCE                        0x2000  /* CLK_FORCE */
#define WM8400_CLK_FORCE_MASK                   0x2000  /* CLK_FORCE */
#define WM8400_CLK_FORCE_SHIFT                      13  /* CLK_FORCE */
#define WM8400_CLK_FORCE_WIDTH                       1  /* CLK_FORCE */
#define WM8400_MCLK_DIV_MASK                    0x1800  /* MCLK_DIV - [12:11] */
#define WM8400_MCLK_DIV_SHIFT                       11  /* MCLK_DIV - [12:11] */
#define WM8400_MCLK_DIV_WIDTH                        2  /* MCLK_DIV - [12:11] */
#define WM8400_MCLK_INV                         0x0400  /* MCLK_INV */
#define WM8400_MCLK_INV_MASK                    0x0400  /* MCLK_INV */
#define WM8400_MCLK_INV_SHIFT                       10  /* MCLK_INV */
#define WM8400_MCLK_INV_WIDTH                        1  /* MCLK_INV */
#define WM8400_ADC_CLKDIV_MASK                  0x00E0  /* ADC_CLKDIV - [7:5] */
#define WM8400_ADC_CLKDIV_SHIFT                      5  /* ADC_CLKDIV - [7:5] */
#define WM8400_ADC_CLKDIV_WIDTH                      3  /* ADC_CLKDIV - [7:5] */
#define WM8400_DAC_CLKDIV_MASK                  0x001C  /* DAC_CLKDIV - [4:2] */
#define WM8400_DAC_CLKDIV_SHIFT                      2  /* DAC_CLKDIV - [4:2] */
#define WM8400_DAC_CLKDIV_WIDTH                      3  /* DAC_CLKDIV - [4:2] */

/*
 * R9 (0x09) - Audio Interface (3)
 */
#define WM8400_AIF_MSTR1                        0x8000  /* AIF_MSTR1 */
#define WM8400_AIF_MSTR1_MASK                   0x8000  /* AIF_MSTR1 */
#define WM8400_AIF_MSTR1_SHIFT                      15  /* AIF_MSTR1 */
#define WM8400_AIF_MSTR1_WIDTH                       1  /* AIF_MSTR1 */
#define WM8400_AIF_MSTR2                        0x4000  /* AIF_MSTR2 */
#define WM8400_AIF_MSTR2_MASK                   0x4000  /* AIF_MSTR2 */
#define WM8400_AIF_MSTR2_SHIFT                      14  /* AIF_MSTR2 */
#define WM8400_AIF_MSTR2_WIDTH                       1  /* AIF_MSTR2 */
#define WM8400_AIF_SEL                          0x2000  /* AIF_SEL */
#define WM8400_AIF_SEL_MASK                     0x2000  /* AIF_SEL */
#define WM8400_AIF_SEL_SHIFT                        13  /* AIF_SEL */
#define WM8400_AIF_SEL_WIDTH                         1  /* AIF_SEL */
#define WM8400_ADCLRC_DIR                       0x0800  /* ADCLRC_DIR */
#define WM8400_ADCLRC_DIR_MASK                  0x0800  /* ADCLRC_DIR */
#define WM8400_ADCLRC_DIR_SHIFT                     11  /* ADCLRC_DIR */
#define WM8400_ADCLRC_DIR_WIDTH                      1  /* ADCLRC_DIR */
#define WM8400_ADCLRC_RATE_MASK                 0x07FF  /* ADCLRC_RATE - [10:0] */
#define WM8400_ADCLRC_RATE_SHIFT                     0  /* ADCLRC_RATE - [10:0] */
#define WM8400_ADCLRC_RATE_WIDTH                    11  /* ADCLRC_RATE - [10:0] */

/*
 * R10 (0x0A) - Audio Interface (4)
 */
#define WM8400_ALRCGPIO1                        0x8000  /* ALRCGPIO1 */
#define WM8400_ALRCGPIO1_MASK                   0x8000  /* ALRCGPIO1 */
#define WM8400_ALRCGPIO1_SHIFT                      15  /* ALRCGPIO1 */
#define WM8400_ALRCGPIO1_WIDTH                       1  /* ALRCGPIO1 */
#define WM8400_ALRCBGPIO6                       0x4000  /* ALRCBGPIO6 */
#define WM8400_ALRCBGPIO6_MASK                  0x4000  /* ALRCBGPIO6 */
#define WM8400_ALRCBGPIO6_SHIFT                     14  /* ALRCBGPIO6 */
#define WM8400_ALRCBGPIO6_WIDTH                      1  /* ALRCBGPIO6 */
#define WM8400_AIF_TRIS                         0x2000  /* AIF_TRIS */
#define WM8400_AIF_TRIS_MASK                    0x2000  /* AIF_TRIS */
#define WM8400_AIF_TRIS_SHIFT                       13  /* AIF_TRIS */
#define WM8400_AIF_TRIS_WIDTH                        1  /* AIF_TRIS */
#define WM8400_DACLRC_DIR                       0x0800  /* DACLRC_DIR */
#define WM8400_DACLR