path: root/include/linux/qed/common_hsi.h

/* QLogic qed NIC Driver
 * Copyright (c) 2015-2016  QLogic Corporation
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and /or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef _COMMON_HSI_H
#define _COMMON_HSI_H

#include <linux/types.h>
#include <asm/byteorder.h>
#include <linux/bitops.h>
#include <linux/slab.h>

/* dma_addr_t manip */
#define PTR_LO(x)		((u32)(((uintptr_t)(x)) & 0xffffffff))
#define PTR_HI(x)		((u32)((((uintptr_t)(x)) >> 16) >> 16))
#define DMA_LO_LE(x)		cpu_to_le32(lower_32_bits(x))
#define DMA_HI_LE(x)		cpu_to_le32(upper_32_bits(x))
#define DMA_REGPAIR_LE(x, val)	do { \
					(x).hi = DMA_HI_LE((val)); \
					(x).lo = DMA_LO_LE((val)); \
				} while (0)

#define HILO_GEN(hi, lo, type)		((((type)(hi)) << 32) + (lo))
#define HILO_64(hi, lo) \
	HILO_GEN(le32_to_cpu(hi), le32_to_cpu(lo), u64)
#define HILO_64_REGPAIR(regpair) ({ \
	typeof(regpair) __regpair = (regpair); \
	HILO_64(__regpair.hi, __regpair.lo); })
#define HILO_DMA_REGPAIR(regpair)	((dma_addr_t)HILO_64_REGPAIR(regpair))

#ifndef __COMMON_HSI__
#define __COMMON_HSI__

/********************************/
/* PROTOCOL COMMON FW CONSTANTS */
/********************************/

#define X_FINAL_CLEANUP_AGG_INT			1

#define EVENT_RING_PAGE_SIZE_BYTES		4096

#define NUM_OF_GLOBAL_QUEUES			128
#define COMMON_QUEUE_ENTRY_MAX_BYTE_SIZE	64

#define ISCSI_CDU_TASK_SEG_TYPE			0
#define FCOE_CDU_TASK_SEG_TYPE			0
#define RDMA_CDU_TASK_SEG_TYPE			1

#define FW_ASSERT_GENERAL_ATTN_IDX		32

#define MAX_PINNED_CCFC				32

/* Queue Zone sizes in bytes */
#define TSTORM_QZONE_SIZE	8
#define MSTORM_QZONE_SIZE	16
#define USTORM_QZONE_SIZE	8
#define XSTORM_QZONE_SIZE	8
#define YSTORM_QZONE_SIZE	0
#define PSTORM_QZONE_SIZE	0

#define MSTORM_VF_ZONE_DEFAULT_SIZE_LOG		7
#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DEFAULT	16
#define ETH_MAX_NUM_RX_QUEUES_PER_VF_DOUBLE	48
#define ETH_MAX_NUM_RX_QUEUES_PER_VF_QUAD	112

/********************************/
/* CORE (LIGHT L2) FW CONSTANTS */
/********************************/

#define CORE_LL2_MAX_RAMROD_PER_CON	8
#define CORE_LL2_TX_BD_PAGE_SIZE_BYTES	4096
#define CORE_LL2_RX_BD_PAGE_SIZE_BYTES	4096
#define CORE_LL2_RX_CQE_PAGE_SIZE_BYTES	4096
#define CORE_LL2_RX_NUM_NEXT_PAGE_BDS	1

#define CORE_LL2_TX_MAX_BDS_PER_PACKET	12

#define CORE_SPQE_PAGE_SIZE_BYTES	4096

#define MAX_NUM_LL2_RX_QUEUES		48
#define MAX_NUM_LL2_TX_STATS_COUNTERS	48

#define FW_MAJOR_VERSION	8
#define FW_MINOR_VERSION	20
#define FW_REVISION_VERSION	0
#define FW_ENGINEERING_VERSION	0

/***********************/
/* COMMON HW CONSTANTS */
/***********************/

/* PCI functions */
#define MAX_NUM_PORTS_K2	(4)
#define MAX_NUM_PORTS_BB	(2)
#define MAX_NUM_PORTS		(MAX_NUM_PORTS_K2)

#define MAX_NUM_PFS_K2		(16)
#define MAX_NUM_PFS_BB		(8)
#define MAX_NUM_PFS		(MAX_NUM_PFS_K2)
#define MAX_NUM_OF_PFS_IN_CHIP	(16) /* On both engines */

#define MAX_NUM_VFS_K2	(192)
#define MAX_NUM_VFS_BB	(120)
#define MAX_NUM_VFS	(MAX_NUM_VFS_K2)

#define MAX_NUM_FUNCTIONS_BB	(MAX_NUM_PFS_BB + MAX_NUM_VFS_BB)
#define MAX_NUM_FUNCTIONS	(MAX_NUM_PFS + MAX_NUM_VFS)

#define MAX_FUNCTION_NUMBER_BB	(MAX_NUM_PFS + MAX_NUM_VFS_BB)
#define MAX_FUNCTION_NUMBER	(MAX_NUM_PFS + MAX_NUM_VFS)

#define MAX_NUM_VPORTS_K2	(208)
#define MAX_NUM_VPORTS_BB	(160)
#define MAX_NUM_VPORTS		(MAX_NUM_VPORTS_K2)

#define MAX_NUM_L2_QUEUES_K2	(320)
#define MAX_NUM_L2_QUEUES_BB	(256)
#define MAX_NUM_L2_QUEUES	(MAX_NUM_L2_QUEUES_K2)

/* Traffic classes in network-facing blocks (PBF, BTB, NIG, BRB, PRS and QM) */
#define NUM_PHYS_TCS_4PORT_K2	(4)
#define NUM_OF_PHYS_TCS		(8)

#define NUM_TCS_4PORT_K2	(NUM_PHYS_TCS_4PORT_K2 + 1)
#define NUM_OF_TCS		(NUM_OF_PHYS_TCS + 1)

#define LB_TC			(NUM_OF_PHYS_TCS)

#define MAX_NUM_VOQS_K2		(NUM_TCS_4PORT_K2 * MAX_NUM_PORTS_K2)
#define MAX_NUM_VOQS_BB		(NUM_OF_TCS * MAX_NUM_PORTS_BB)
#define MAX_NUM_VOQS_E4		(MAX_NUM_VOQS_K2)
#define MAX_PHYS_VOQS		(NUM_OF_PHYS_TCS * MAX_NUM_PORTS_BB)

/* CIDs */
#define NUM_OF_CONNECTION_TYPES_E4	(8)
#define NUM_OF_LCIDS			(320)
#define NUM_OF_LTIDS			(320)

/* Global PXP windows (GTT) */
#define NUM_OF_GTT		19
#define GTT_DWORD_SIZE_BITS	10
#define GTT_BYTE_SIZE_BITS	(GTT_DWORD_SIZE_BITS + 2)
#define GTT_DWORD_SIZE		BIT(GTT_DWORD_SIZE_BITS)

/* Tools Version */