// SPDX-License-Identifier: GPL-2.0-only
//
// ALSA SoC Audio driver for CS47L15 codec
//
// Copyright (C) 2016-2019 Cirrus Logic, Inc. and
// Cirrus Logic International Semiconductor Ltd.
//
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/tlv.h>
#include <linux/irqchip/irq-madera.h>
#include <linux/mfd/madera/core.h>
#include <linux/mfd/madera/registers.h>
#include "madera.h"
#include "wm_adsp.h"
#define CS47L15_NUM_ADSP 1
#define CS47L15_MONO_OUTPUTS 1
/* Mid-mode registers */
#define CS47L15_ADC_INT_BIAS_MASK 0x3800
#define CS47L15_ADC_INT_BIAS_SHIFT 11
#define CS47L15_PGA_BIAS_SEL_MASK 0x03
#define CS47L15_PGA_BIAS_SEL_SHIFT 0
#define DRV_NAME "cs47l15-codec"
struct cs47l15 {
struct madera_priv core;
struct madera_fll fll[2];
bool in1_lp_mode;
};
static const struct cs_dsp_region cs47l15_dsp1_regions[] = {
{ .type = WMFW_ADSP2_PM, .base = 0x080000 },
{ .type = WMFW_ADSP2_ZM, .base = 0x0e0000 },
{ .type = WMFW_ADSP2_XM, .base = 0x0a0000 },
{ .type = WMFW_ADSP2_YM, .base = 0x0c0000 },
};
static const char * const cs47l15_outdemux_texts[] = {
"HPOUT",
"EPOUT",
};
static SOC_ENUM_SINGLE_DECL(cs47l15_outdemux_enum, SND_SOC_NOPM, 0,
cs47l15_outdemux_texts);
static const struct snd_kcontrol_new cs47l15_outdemux =
SOC_DAPM_ENUM_EXT("HPOUT1 Demux", cs47l15_outdemux_enum,
madera_out1_demux_get, madera_out1_demux_put);
static int cs47l15_adsp_power_ev(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *component =
snd_soc_dapm_to_component(w->dapm);
struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
struct madera_priv *priv = &cs47l15->core;
struct madera *madera = priv->madera;
unsigned int freq;
int ret;
ret = regmap_read(madera->regmap, MADERA_DSP_CLOCK_2, &freq);
if (ret != 0) {
dev_err(madera->dev,
"Failed to read MADERA_DSP_CLOCK_2: %d\n", ret);
return ret;
}
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
ret = madera_set_adsp_clk(&cs47l15->core, w->shift, freq);
if (ret)
return ret;
break;
default:
break;
}
return wm_adsp_early_event(w, kcontrol, event);
}
#define CS47L15_NG_SRC(name, base) \
SOC_SINGLE(name " NG HPOUT1L Switch", base, 0, 1, 0), \
SOC_SINGLE(name " NG HPOUT1R Switch", base, 1, 1, 0), \
SOC_SINGLE(name " NG SPKOUTL Switch", base, 6, 1, 0), \
SOC_SINGLE(name " NG SPKDAT1L Switch", base, 8, 1, 0), \
SOC_SINGLE(name " NG SPKDAT1R Switch", base, 9, 1, 0)
static int cs47l15_in1_adc_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component =
snd_soc_kcontrol_component(kcontrol);
struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
ucontrol->value.integer.value[0] = !!cs47l15->in1_lp_mode;
return 0;
}
static int cs47l15_in1_adc_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
struct snd_soc_component *component =
snd_soc_kcontrol_component(kcontrol);
struct cs47l15 *cs47l15 = snd_soc_component_get_drvdata(component);
if (!!ucontrol->value.integer.value[0] == cs47l15->in1_lp_mode)
return 0;
switch (ucontrol->value.integer.value[0]) {
case 0:
/* Set IN1 to normal mode */
snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
MADERA_IN1_OSR_MASK,
5 << MADERA_IN1_OSR_SHIFT);
snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
CS47L15_ADC_INT_BIAS_MASK,
4 << CS47L15_ADC_INT_BIAS_SHIFT);
snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
CS47L15_PGA_BIAS_SEL_MASK, 0);
cs47l15->in1_lp_mode = false;
break;
default:
/* Set IN1 to LP mode */
snd_soc_component_update_bits(component, MADERA_DMIC1L_CONTROL,
MADERA_IN1_OSR_MASK,
4 << MADERA_IN1_OSR_SHIFT);
snd_soc_component_update_bits(component, CS47L15_ADC_INT_BIAS,
CS47L15_ADC_INT_BIAS_MASK,
1 << CS47L15_ADC_INT_BIAS_SHIFT);
snd_soc_component_update_bits(component, CS47L15_PGA_BIAS_SEL,
CS47L15_PGA_BIAS_SEL_MASK,
3 << CS47L15_PGA_BIAS_SEL_SHIFT);
cs47l15->in1_lp_mode = true;
break;
}
return 1;
}
static const struct snd_kcontrol_new cs47l15_snd_controls[] = {
SOC_ENUM("IN1 OSR", madera_in_dmic_osr[0]),
SOC_ENUM("IN2 OSR", madera_in_dmic_osr[1]),
SOC_SINGLE_RANGE_TLV("IN1L Volume", MADERA_IN1L_CONTROL,
MADERA_IN1L_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
SOC_SINGLE_RANGE_TLV("IN1R Volume", MADERA_IN1R_CONTROL,
MADERA_IN1R_PGA_VOL_SHIFT, 0x40, 0x5f, 0, madera_ana_tlv),
SOC_ENUM("IN HPF Cutoff Frequency", madera_in_hpf_cut_enum),
SOC_SINGLE("IN1L HPF Switch", MADERA_IN1L_CONTROL, MADERA_IN1L_HPF_SHIFT, 1, 0),
SOC_SINGLE("IN1R HPF Switch", MADERA_IN1R_CONTROL, MADERA_IN1R_HPF_SHIFT, 1, 0),
SOC_SINGLE("IN2L HPF Switch", MADERA_IN2L_CONTROL, MADERA_IN2L_HPF_SHIFT, 1, 0),
SOC_SINGLE("IN2R HPF Switch", MADERA_IN2R_CONTROL, MADERA_IN2R_HPF_SHIFT, 1, 0),
SOC_SINGLE_TLV("IN1L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1L,
MADERA_IN1L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
SOC_SINGLE_TLV("IN1R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_1R,
MADERA_IN1R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
SOC_SINGLE_TLV("IN2L Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2L,
MADERA_IN2L_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
SOC_SINGLE_TLV("IN2R Digital Volume", MADERA_ADC_DIGITAL_VOLUME_2R,
MADERA_IN2R_DIG_VOL_SHIFT, 0xbf, 0, madera_digital_tlv),
SOC_ENUM("Input Ramp Up", madera_in_vi_ramp),
SOC_ENUM("Input Ramp Down", madera_in_vd_ramp),
MADERA_MIXER_CONTROLS("EQ1", MADERA_EQ1MIX_INPUT_1_SOURCE),
MADERA_MIXER_CONTROLS("EQ2", MADERA_EQ2MIX_INPUT_1_SOURCE),
MADERA_MIXER_CONTROLS("EQ3", MADERA_EQ3MIX_INPUT_1_SOURCE),
MADERA_MIXER_CONTROLS("EQ4", MADERA_EQ4MIX_INPUT_1_SOURCE),
MADERA_EQ_CONTROL("EQ1 Coefficients", MADERA_EQ1_2),
SOC_SINGLE_TLV("EQ1 B1 Volume", MADERA_EQ1_1, MADERA_EQ1_B1_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ1 B2 Volume", MADERA_EQ1_1, MADERA_EQ1_B2_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ1 B3 Volume", MADERA_EQ1_1, MADERA_EQ1_B3_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ1 B4 Volume", MADERA_EQ1_2, MADERA_EQ1_B4_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ1 B5 Volume", MADERA_EQ1_2, MADERA_EQ1_B5_GAIN_SHIFT,
24, 0, madera_eq_tlv),
MADERA_EQ_CONTROL("EQ2 Coefficients", MADERA_EQ2_2),
SOC_SINGLE_TLV("EQ2 B1 Volume", MADERA_EQ2_1, MADERA_EQ2_B1_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ2 B2 Volume", MADERA_EQ2_1, MADERA_EQ2_B2_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ2 B3 Volume", MADERA_EQ2_1, MADERA_EQ2_B3_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ2 B4 Volume", MADERA_EQ2_2, MADERA_EQ2_B4_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ2 B5 Volume", MADERA_EQ2_2, MADERA_EQ2_B5_GAIN_SHIFT,
24, 0, madera_eq_tlv),
MADERA_EQ_CONTROL("EQ3 Coefficients", MADERA_EQ3_2),
SOC_SINGLE_TLV("EQ3 B1 Volume", MADERA_EQ3_1, MADERA_EQ3_B1_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ3 B2 Volume", MADERA_EQ3_1, MADERA_EQ3_B2_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ3 B3 Volume", MADERA_EQ3_1, MADERA_EQ3_B3_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ3 B4 Volume", MADERA_EQ3_2, MADERA_EQ3_B4_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ3 B5 Volume", MADERA_EQ3_2, MADERA_EQ3_B5_GAIN_SHIFT,
24, 0, madera_eq_tlv),
MADERA_EQ_CONTROL("EQ4 Coefficients", MADERA_EQ4_2),
SOC_SINGLE_TLV("EQ4 B1 Volume", MADERA_EQ4_1, MADERA_EQ4_B1_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ4 B2 Volume", MADERA_EQ4_1, MADERA_EQ4_B2_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ4 B3 Volume", MADERA_EQ4_1, MADERA_EQ4_B3_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ4 B4 Volume", MADERA_EQ4_2, MADERA_EQ4_B4_GAIN_SHIFT,
24, 0, madera_eq_tlv),
SOC_SINGLE_TLV("EQ4 B5 Volume", MADERA_EQ4_2, MADERA_EQ4_B5_GAIN_SHIFT,
24, 0, madera_eq_tlv),
MADERA_MIXER_CONTROLS("DRC1L", MADERA_DRC1LMIX_INPUT_1_SOURCE),
MADERA_MIXER_CONTROLS("DRC1R", MADERA_DRC1RMIX_INPUT_1_SOURCE),
MADERA_MIXER_CONTROLS("DRC2L", MADERA_DRC2L
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