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[
    {
        "BriefDescription": "DRAM Activate Count",
        "Counter": "0,1,2,3",
        "EventCode": "0x1",
        "EventName": "UNC_M_ACT_COUNT",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of DRAM Activate commands sent on this channel.  Activate commands are issued to open up a page on the DRAM devices so that it can be read or written to with a CAS.  One can calculate the number of Page Misses by subtracting the number of Page Miss precharges from the number of Activates.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (w/ and w/out auto-pre)",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.ALL",
        "PerPkg": "1",
        "UMask": "0xf",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM Reads (RD_CAS + Underfills)",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.RD",
        "PerPkg": "1",
        "UMask": "0x3",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM RD_CAS (w/ and w/out auto-pre)",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.RD_REG",
        "PerPkg": "1",
        "UMask": "0x1",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; Underfill Read Issued",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.RD_UNDERFILL",
        "PerPkg": "1",
        "UMask": "0x2",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; All DRAM WR_CAS (both Modes)",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.WR",
        "PerPkg": "1",
        "UMask": "0xc",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Read Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.WR_RMM",
        "PerPkg": "1",
        "UMask": "0x8",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM RD_CAS and WR_CAS Commands.; DRAM WR_CAS (w/ and w/out auto-pre) in Write Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x4",
        "EventName": "UNC_M_CAS_COUNT.WR_WMM",
        "PerPkg": "1",
        "UMask": "0x4",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "uclks",
        "Counter": "0,1,2,3",
        "EventName": "UNC_M_CLOCKTICKS",
        "PerPkg": "1",
        "PublicDescription": "Uncore Fixed Counter - uclks",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "DRAM Precharge All Commands",
        "Counter": "0,1,2,3",
        "EventCode": "0x6",
        "EventName": "UNC_M_DRAM_PRE_ALL",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of times that the precharge all command was sent.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Number of DRAM Refreshes Issued",
        "Counter": "0,1,2,3",
        "EventCode": "0x5",
        "EventName": "UNC_M_DRAM_REFRESH.HIGH",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of refreshes issued.",
        "UMask": "0x4",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Number of DRAM Refreshes Issued",
        "Counter": "0,1,2,3",
        "EventCode": "0x5",
        "EventName": "UNC_M_DRAM_REFRESH.PANIC",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of refreshes issued.",
        "UMask": "0x2",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "ECC Correctable Errors",
        "Counter": "0,1,2,3",
        "EventCode": "0x9",
        "EventName": "UNC_M_ECC_CORRECTABLE_ERRORS",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of ECC errors detected and corrected by the iMC on this channel.  This counter is only useful with ECC DRAM devices.  This count will increment one time for each correction regardless of the number of bits corrected.  The iMC can correct up to 4 bit errors in independent channel mode and 8 bit errors in lockstep mode.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Cycles in a Major Mode; Isoch Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x7",
        "EventName": "UNC_M_MAJOR_MODES.ISOCH",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of cycles spent in a major mode (selected by a filter) on the given channel.   Major modea are channel-wide, and not a per-rank (or dimm or bank) mode.",
        "UMask": "0x8",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Cycles in a Major Mode; Partial Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x7",
        "EventName": "UNC_M_MAJOR_MODES.PARTIAL",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of cycles spent in a major mode (selected by a filter) on the given channel.   Major modea are channel-wide, and not a per-rank (or dimm or bank) mode.",
        "UMask": "0x4",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Cycles in a Major Mode; Read Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x7",
        "EventName": "UNC_M_MAJOR_MODES.READ",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of cycles spent in a major mode (selected by a filter) on the given channel.   Major modea are channel-wide, and not a per-rank (or dimm or bank) mode.",
        "UMask": "0x1",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Cycles in a Major Mode; Write Major Mode",
        "Counter": "0,1,2,3",
        "EventCode": "0x7",
        "EventName": "UNC_M_MAJOR_MODES.WRITE",
        "PerPkg": "1",
        "PublicDescription": "Counts the total number of cycles spent in a major mode (selected by a filter) on the given channel.   Major modea are channel-wide, and not a per-rank (or dimm or bank) mode.",
        "UMask": "0x2",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Channel DLLOFF Cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x84",
        "EventName": "UNC_M_POWER_CHANNEL_DLLOFF",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles when all the ranks in the channel are in CKE Slow (DLLOFF) mode.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Channel PPD Cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x85",
        "EventName": "UNC_M_POWER_CHANNEL_PPD",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles when all the ranks in the channel are in PPD mode.  If IBT=off is enabled, then this can be used to count those cycles.  If it is not enabled, then this can count the number of cycles when that could have been taken advantage of.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK0",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x1",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK1",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x2",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK2",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x4",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK3",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x8",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK4",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x10",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK5",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x20",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK6",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x40",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "CKE_ON_CYCLES by Rank; DIMM ID",
        "Counter": "0,1,2,3",
        "EventCode": "0x83",
        "EventName": "UNC_M_POWER_CKE_CYCLES.RANK7",
        "PerPkg": "1",
        "PublicDescription": "Number of cycles spent in CKE ON mode.  The filter allows you to select a rank to monitor.  If multiple ranks are in CKE ON mode at one time, the counter will ONLY increment by one rather than doing accumulation.  Multiple counters will need to be used to track multiple ranks simultaneously.  There is no distinction between the different CKE modes (APD, PPDS, PPDF).  This can be determined based on the system programming.  These events should commonly be used with Invert to get the number of cycles in power saving mode.  Edge Detect is also useful here.  Make sure that you do NOT use Invert with Edge Detect (this just confuses the system and is not necessary).",
        "UMask": "0x80",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Critical Throttle Cycles",
        "Counter": "0,1,2,3",
        "EventCode": "0x86",
        "EventName": "UNC_M_POWER_CRITICAL_THROTTLE_CYCLES",
        "PerPkg": "1",
        "PublicDescription": "Counts the number of cycles when the iMC is in critical thermal throttling.  When this happens, all traffic is blocked.  This should be rare unless something bad is going on in the platform.  There is no filtering by rank for this event.",
        "Unit": "iMC"
    },
    {
        "BriefDescription": "Clock-Enabled Self-Refresh",
        "Counter"