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| author | Jani Nikula <jani.nikula@intel.com> | 2024-06-04 18:26:13 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2024-06-07 11:29:00 +0300 |
| commit | 0b406cc993297a0cd718e041a8456ffb7ee5445b (patch) | |
| tree | fb489e18f314eef46dcb29721b65a4a51ffe23ba /drivers/gpu/drm/i915/display/intel_display.c | |
| parent | 3c461986e8ab2bc126a2bb7868b4f9f3b125e965 (diff) | |
| download | linux-0b406cc993297a0cd718e041a8456ffb7ee5445b.tar.gz linux-0b406cc993297a0cd718e041a8456ffb7ee5445b.tar.bz2 linux-0b406cc993297a0cd718e041a8456ffb7ee5445b.zip | |
drm/i915: pass dev_priv explicitly to PIPE_LINK_N1
Avoid the implicit dev_priv local variable use, and pass dev_priv
explicitly to the PIPE_LINK_N1 register macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0960c3726a36999b38084dce6c3824882921c475.1717514638.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_display.c')
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index a3249d782a8b..eef317984564 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -2644,7 +2644,7 @@ void intel_cpu_transcoder_set_m1_n1(struct intel_crtc *crtc, PIPE_DATA_M1(dev_priv, transcoder), PIPE_DATA_N1(dev_priv, transcoder), PIPE_LINK_M1(dev_priv, transcoder), - PIPE_LINK_N1(transcoder)); + PIPE_LINK_N1(dev_priv, transcoder)); else intel_set_m_n(dev_priv, m_n, PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), @@ -3343,7 +3343,7 @@ void intel_cpu_transcoder_get_m1_n1(struct intel_crtc *crtc, PIPE_DATA_M1(dev_priv, transcoder), PIPE_DATA_N1(dev_priv, transcoder), PIPE_LINK_M1(dev_priv, transcoder), - PIPE_LINK_N1(transcoder)); + PIPE_LINK_N1(dev_priv, transcoder)); else intel_get_m_n(dev_priv, m_n, PIPE_DATA_M_G4X(pipe), PIPE_DATA_N_G4X(pipe), |