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authorLinus Torvalds <torvalds@linux-foundation.org>2018-01-29 11:11:56 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2018-01-29 11:11:56 -0800
commit0fc7e74663447682c904fe375bb680b004ddaa14 (patch)
tree95f89c4a207995e57354c4f44bf7d83b5536370c /drivers/mtd/nand/omap2.c
parentaa5e75bc7a7c4ecbdee7bc85d1a306041b926e24 (diff)
parent571cb17b23eccc22f18c4fc0a0fc34cf0abca7ef (diff)
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Merge tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtd
Pull MTD updates from Boris Brezillon: "MTD core changes: - Rework core functions to avoid duplicating generic checks in NAND/OneNAND sub-layers - Update the MAINTAINERS entry to reflect the fact that MTD maintainers now use a single git tree MTD driver changes: - CFI: use macros instead of inline functions to limit stack usage and make KASAN happy NAND core changes: - Fix NAND_CMD_NONE handling in nand_command[_lp]() hooks - Introduce the ->exec_op() infrastructure - Rework NAND buffers handling - Fix ECC requirements for K9F4G08U0D - Fix nand_do_read_oob() to return the number of bitflips - Mark K9F1G08U0E as not supporting subpage writes NAND driver changes: - MTK: Rework the driver to support new IP versions - OMAP OneNAND: Full rework to use new APIs (libgpio, dmaengine) and fix DT support - Marvell: Add a new driver to replace the pxa3xx one SPI NOR core changes: - Add support to new ISSI and Cypress/Spansion memory parts. - Fix support of Micron memories by checking error bits in the FSR. - Fix update of block-protection bits by reading back the SR. - Restore the internal state of the SPI flash memory when removing the device. SPI NOR driver changes: - Maintenance for Freescale, Intel and Metiatek drivers. - Add support of the direct access mode for the Cadence QSPI controller" * tag 'mtd/for-4.16' of git://git.infradead.org/linux-mtd: (93 commits) mtd: nand: sunxi: Fix ECC strength choice mtd: nand: gpmi: Fix subpage reads mtd: nand: Fix build issues due to an anonymous union mtd: nand: marvell: Fix missing memory allocation modifier mtd: nand: marvell: remove redundant variable 'oob_len' mtd: nand: marvell: fix spelling mistake: "suceed"-> "succeed" mtd: onenand: omap2: Remove redundant dev_err call in omap2_onenand_probe() mtd: Remove duplicate checks on mtd_oob_ops parameter mtd: Fallback to ->_read/write_oob() when ->_read/write() is missing mtd: mtdpart: Make ECC stat handling consistent mtd: onenand: omap2: print resource using %pR format string mtd: mtk-nor: modify functions' name more generally mtd: onenand: samsung: remove incorrect __iomem annotation MAINTAINERS: Add entry for Marvell NAND controller driver ARM: OMAP2+: Remove gpmc-onenand mtd: onenand: omap2: Configure driver from DT mtd: onenand: omap2: Decouple DMA enabling from INT pin availability mtd: onenand: omap2: Do not make delay for GPIO OMAP3 specific mtd: onenand: omap2: Convert to use dmaengine for memcpy mtd: onenand: omap2: Unify OMAP2 and OMAP3 DMA implementation ...
Diffstat (limited to 'drivers/mtd/nand/omap2.c')
-rw-r--r--drivers/mtd/nand/omap2.c28
1 files changed, 17 insertions, 11 deletions
diff --git a/drivers/mtd/nand/omap2.c b/drivers/mtd/nand/omap2.c
index dad438c4906a..8cdf7d3d8fa7 100644
--- a/drivers/mtd/nand/omap2.c
+++ b/drivers/mtd/nand/omap2.c
@@ -1530,7 +1530,9 @@ static int omap_write_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int oob_required, int page)
{
int ret;
- uint8_t *ecc_calc = chip->buffers->ecccalc;
+ uint8_t *ecc_calc = chip->ecc.calc_buf;
+
+ nand_prog_page_begin_op(chip, page, 0, NULL, 0);
/* Enable GPMC ecc engine */
chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
@@ -1548,7 +1550,8 @@ static int omap_write_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
/* Write ecc vector to OOB area */
chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
- return 0;
+
+ return nand_prog_page_end_op(chip);
}
/**
@@ -1568,7 +1571,7 @@ static int omap_write_subpage_bch(struct mtd_info *mtd,
u32 data_len, const u8 *buf,
int oob_required, int page)
{
- u8 *ecc_calc = chip->buffers->ecccalc;
+ u8 *ecc_calc = chip->ecc.calc_buf;
int ecc_size = chip->ecc.size;
int ecc_bytes = chip->ecc.bytes;
int ecc_steps = chip->ecc.steps;
@@ -1582,6 +1585,7 @@ static int omap_write_subpage_bch(struct mtd_info *mtd,
* ECC is calculated for all subpages but we choose
* only what we want.
*/
+ nand_prog_page_begin_op(chip, page, 0, NULL, 0);
/* Enable GPMC ECC engine */
chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
@@ -1605,7 +1609,7 @@ static int omap_write_subpage_bch(struct mtd_info *mtd,
/* copy calculated ECC for whole page to chip->buffer->oob */
/* this include masked-value(0xFF) for unwritten subpages */
- ecc_calc = chip->buffers->ecccalc;
+ ecc_calc = chip->ecc.calc_buf;
ret = mtd_ooblayout_set_eccbytes(mtd, ecc_calc, chip->oob_poi, 0,
chip->ecc.total);
if (ret)
@@ -1614,7 +1618,7 @@ static int omap_write_subpage_bch(struct mtd_info *mtd,
/* write OOB buffer to NAND device */
chip->write_buf(mtd, chip->oob_poi, mtd->oobsize);
- return 0;
+ return nand_prog_page_end_op(chip);
}
/**
@@ -1635,11 +1639,13 @@ static int omap_write_subpage_bch(struct mtd_info *mtd,
static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
uint8_t *buf, int oob_required, int page)
{
- uint8_t *ecc_calc = chip->buffers->ecccalc;
- uint8_t *ecc_code = chip->buffers->ecccode;
+ uint8_t *ecc_calc = chip->ecc.calc_buf;
+ uint8_t *ecc_code = chip->ecc.code_buf;
int stat, ret;
unsigned int max_bitflips = 0;
+ nand_read_page_op(chip, page, 0, NULL, 0);
+
/* Enable GPMC ecc engine */
chip->ecc.hwctl(mtd, NAND_ECC_READ);
@@ -1647,10 +1653,10 @@ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
chip->read_buf(mtd, buf, mtd->writesize);
/* Read oob bytes */
- chip->cmdfunc(mtd, NAND_CMD_RNDOUT,
- mtd->writesize + BADBLOCK_MARKER_LENGTH, -1);
- chip->read_buf(mtd, chip->oob_poi + BADBLOCK_MARKER_LENGTH,
- chip->ecc.total);
+ nand_change_read_column_op(chip,
+ mtd->writesize + BADBLOCK_MARKER_LENGTH,
+ chip->oob_poi + BADBLOCK_MARKER_LENGTH,
+ chip->ecc.total, false);
/* Calculate ecc bytes */
omap_calculate_ecc_bch_multi(mtd, buf, ecc_calc);