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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-03 12:20:54 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-03 12:20:54 -0700 |
| commit | 77624cd2a7783fccf2c518768a6fd7a7aeccd002 (patch) | |
| tree | 406283e54084299dc83f8c5456375941ed5dd67a /drivers/pinctrl | |
| parent | dc73d6a8d42d208c027b4bcca59a77d045895977 (diff) | |
| parent | 4fc97ef94bbfa185d16b3e44199b7559d0668747 (diff) | |
| download | linux-77624cd2a7783fccf2c518768a6fd7a7aeccd002.tar.gz linux-77624cd2a7783fccf2c518768a6fd7a7aeccd002.tar.bz2 linux-77624cd2a7783fccf2c518768a6fd7a7aeccd002.zip | |
Merge tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control bulk updates from Linus Walleij:
"New drivers:
- Qualcomm SDM845: this is their new flagship SoC platform which
seems to be targeted at premium mobile handsets.
- Renesas R-Car M3-N SoC.
- Renesas R8A77980 SoC.
- NXP (ex Freescale) i.MX 6SLL SoC.
- Mediatek MT2712 SoC.
- Allwinner H6 SoC.
Improvements:
- Uniphier adds a few new functions and pins.
- Renesas refactorings and additional pin definitions.
- Improved pin groups for Axis Artpec6.
Cleanup:
- Drop the TZ1090 drivers. This platform is no longer maintained and
is being deleted.
- Drop ST-Ericsson U8540/U9540 support as this was never
productified.
- Overall minor fixes and janitorial"
* tag 'pinctrl-v4.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits)
pinctrl: uniphier: add UART hardware flow control pin-mux settings
pinctrl: sunxi: add support for the Allwinner H6 main pin controller
pinctrl: sunxi: change irq_bank_base to irq_bank_map
pinctrl: sunxi: introduce IRQ bank conversion function
pinctrl: sunxi: refactor irq related register function to have desc
pinctrl: msm8998: Remove owner assignment from platform_driver
pinctrl: uniphier: divide I2S and S/PDIF audio out pin-mux group
pinctrl: uniphier: add PXs2 Audio in/out pin-mux settings
pinctrl/amd: poll InterruptEnable bits in enable_irq
pinctrl: ocelot: fix gpio direction
pinctrl: mtk: fix check warnings.
pintcrl: mtk: support bias-disable of generic and special pins simultaneously
pinctrl: add mt2712 pinctrl driver
pinctrl: pinctrl-single: Fix pcs_request_gpio() when bits_per_mux != 0
pinctrl: imx: Add pinctrl driver support for imx6sll
dt-bindings: imx: update pinctrl doc for imx6sll
pinctrl: intel: Implement intel_gpio_get_direction callback
pinctrl: stm32: add 'depends on HAS_IOMEM' to fix unmet dependency
pinctrl: mediatek: mtk-common: use true and false for boolean values
pinctrl: sunxi: always look for apb block
...
Diffstat (limited to 'drivers/pinctrl')
70 files changed, 13148 insertions, 7246 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 008073570a38..01fe8e0455a0 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig @@ -244,18 +244,6 @@ config PINCTRL_ST select PINCONF select GPIOLIB_IRQCHIP -config PINCTRL_TZ1090 - bool "Toumaz Xenif TZ1090 pin control driver" - depends on SOC_TZ1090 - select PINMUX - select GENERIC_PINCONF - -config PINCTRL_TZ1090_PDC - bool "Toumaz Xenif TZ1090 PDC pin control driver" - depends on SOC_TZ1090 - select PINMUX - select PINCONF - config PINCTRL_U300 bool "U300 pin controller driver" depends on ARCH_U300 diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 92a40bdb6273..657332b121fb 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -31,8 +31,6 @@ obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o obj-$(CONFIG_PINCTRL_SIRF) += sirf/ obj-$(CONFIG_PINCTRL_SX150X) += pinctrl-sx150x.o obj-$(CONFIG_ARCH_TEGRA) += tegra/ -obj-$(CONFIG_PINCTRL_TZ1090) += pinctrl-tz1090.o -obj-$(CONFIG_PINCTRL_TZ1090_PDC) += pinctrl-tz1090-pdc.o obj-$(CONFIG_PINCTRL_U300) += pinctrl-u300.o obj-$(CONFIG_PINCTRL_COH901) += pinctrl-coh901.o obj-$(CONFIG_PINCTRL_XWAY) += pinctrl-xway.o diff --git a/drivers/pinctrl/core.c b/drivers/pinctrl/core.c index 2c0dbfcff3e6..e5a303002021 100644 --- a/drivers/pinctrl/core.c +++ b/drivers/pinctrl/core.c @@ -1416,6 +1416,7 @@ int pinctrl_register_mappings(const struct pinctrl_map *maps, { return pinctrl_register_map(maps, num_maps, true); } +EXPORT_SYMBOL_GPL(pinctrl_register_mappings); void pinctrl_unregister_map(const struct pinctrl_map *map) { @@ -1586,6 +1587,7 @@ static int pinctrl_pins_show(struct seq_file *s, void *what) return 0; } +DEFINE_SHOW_ATTRIBUTE(pinctrl_pins); static int pinctrl_groups_show(struct seq_file *s, void *what) { @@ -1631,6 +1633,7 @@ static int pinctrl_groups_show(struct seq_file *s, void *what) return 0; } +DEFINE_SHOW_ATTRIBUTE(pinctrl_groups); static int pinctrl_gpioranges_show(struct seq_file *s, void *what) { @@ -1664,6 +1667,7 @@ static int pinctrl_gpioranges_show(struct seq_file *s, void *what) return 0; } +DEFINE_SHOW_ATTRIBUTE(pinctrl_gpioranges); static int pinctrl_devices_show(struct seq_file *s, void *what) { @@ -1690,6 +1694,7 @@ static int pinctrl_devices_show(struct seq_file *s, void *what) return 0; } +DEFINE_SHOW_ATTRIBUTE(pinctrl_devices); static inline const char *map_type(enum pinctrl_map_type type) { @@ -1743,6 +1748,7 @@ static int pinctrl_maps_show(struct seq_file *s, void *what) return 0; } +DEFINE_SHOW_ATTRIBUTE(pinctrl_maps); static int pinctrl_show(struct seq_file *s, void *what) { @@ -1788,87 +1794,30 @@ static int pinctrl_show(struct seq_file *s, void *what) return 0; } - -static int pinctrl_pins_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_pins_show, inode->i_private); -} - -static int pinctrl_groups_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_groups_show, inode->i_private); -} - -static int pinctrl_gpioranges_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_gpioranges_show, inode->i_private); -} - -static int pinctrl_devices_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_devices_show, NULL); -} - -static int pinctrl_maps_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_maps_show, NULL); -} - -static int pinctrl_open(struct inode *inode, struct file *file) -{ - return single_open(file, pinctrl_show, NULL); -} - -static const struct file_operations pinctrl_pins_ops = { - .open = pinctrl_pins_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations pinctrl_groups_ops = { - .open = pinctrl_groups_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations pinctrl_gpioranges_ops = { - .open = pinctrl_gpioranges_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations pinctrl_devices_ops = { - .open = pinctrl_devices_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations pinctrl_maps_ops = { - .open = pinctrl_maps_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; - -static const struct file_operations pinctrl_ops = { - .open = pinctrl_open, - .read = seq_read, - .llseek = seq_lseek, - .release = single_release, -}; +DEFINE_SHOW_ATTRIBUTE(pinctrl); static struct dentry *debugfs_root; static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) { struct dentry *device_root; + const char *debugfs_name; + + if (pctldev->desc->name && + strcmp(dev_name(pctldev->dev), pctldev->desc->name)) { + debugfs_name = devm_kasprintf(pctldev->dev, GFP_KERNEL, + "%s-%s", dev_name(pctldev->dev), + pctldev->desc->name); + if (!debugfs_name) { + pr_warn("failed to determine debugfs dir name for %s\n", + dev_name(pctldev->dev)); + return; + } + } else { + debugfs_name = dev_name(pctldev->dev); + } - device_root = debugfs_create_dir(dev_name(pctldev->dev), - debugfs_root); + device_root = debugfs_create_dir(debugfs_name, debugfs_root); pctldev->device_root = device_root; if (IS_ERR(device_root) || !device_root) { @@ -1877,11 +1826,11 @@ static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev) return; } debugfs_create_file("pins", S_IFREG | S_IRUGO, - device_root, pctldev, &pinctrl_pins_ops); + device_root, pctldev, &pinctrl_pins_fops); debugfs_create_file("pingroups", S_IFREG | S_IRUGO, - device_root, pctldev, &pinctrl_groups_ops); + device_root, pctldev, &pinctrl_groups_fops); debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO, - device_root, pctldev, &pinctrl_gpioranges_ops); + device_root, pctldev, &pinctrl_gpioranges_fops); if (pctldev->desc->pmxops) pinmux_init_device_debugfs(device_root, pctldev); if (pctldev->desc->confops) @@ -1903,11 +1852,11 @@ static void pinctrl_init_debugfs(void) } debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO, - debugfs_root, NULL, &pinctrl_devices_ops); + debugfs_root, NULL, &pinctrl_devices_fops); debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO, - debugfs_root, NULL, &pinctrl_maps_ops); + debugfs_root, NULL, &pinctrl_maps_fops); debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO, - debugfs_root, NULL, &pinctrl_ops); + debugfs_root, NULL, &pinctrl_fops); } #else /* CONFIG_DEBUG_FS */ diff --git a/drivers/pinctrl/devicetree.c b/drivers/pinctrl/devicetree.c index 1ff6c3573493..b601039d6c69 100644 --- a/drivers/pinctrl/devicetree.c +++ b/drivers/pinctrl/devicetree.c @@ -122,8 +122,10 @@ static int dt_to_map_one_config(struct pinctrl *p, /* OK let's just assume this will appear later then */ return -EPROBE_DEFER; } - if (!pctldev) - pctldev = get_pinctrl_dev_from_of_node(np_pctldev); + /* If we're creating a hog we can use the passed pctldev */ + if (pctldev && (np_pctldev == p->dev->of_node)) + break; + pctldev = get_pinctrl_dev_from_of_node(np_pctldev); if (pctldev) break; /* Do not defer probing of hogs (circular loop) */ diff --git a/drivers/pinctrl/freescale/Kconfig b/drivers/pinctrl/freescale/Kconfig index 4dbc576ae27c..0d8ba1ef5329 100644 --- a/drivers/pinctrl/freescale/Kconfig +++ b/drivers/pinctrl/freescale/Kconfig @@ -82,6 +82,13 @@ config PINCTRL_IMX6SL help Say Y here to enable the imx6sl pinctrl driver +config PINCTRL_IMX6SLL + bool "IMX6SLL pinctrl driver" + depends on SOC_IMX6SLL + select PINCTRL_IMX + help + Say Y here to enable the imx6sll pinctrl driver + config PINCTRL_IMX6SX bool "IMX6SX pinctrl driver" depends on SOC_IMX6SX diff --git a/drivers/pinctrl/freescale/Makefile b/drivers/pinctrl/freescale/Makefile index 19bb9a55a567..368be8cfc9b1 100644 --- a/drivers/pinctrl/freescale/Makefile +++ b/drivers/pinctrl/freescale/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_PINCTRL_IMX53) += pinctrl-imx53.o obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6q.o obj-$(CONFIG_PINCTRL_IMX6Q) += pinctrl-imx6dl.o obj-$(CONFIG_PINCTRL_IMX6SL) += pinctrl-imx6sl.o +obj-$(CONFIG_PINCTRL_IMX6SLL) += pinctrl-imx6sll.o obj-$(CONFIG_PINCTRL_IMX6SX) += pinctrl-imx6sx.o obj-$(CONFIG_PINCTRL_IMX6UL) += pinctrl-imx6ul.o obj-$(CONFIG_PINCTRL_IMX7D) += pinctrl-imx7d.o diff --git a/drivers/pinctrl/freescale/pinctrl-imx6sll.c b/drivers/pinctrl/freescale/pinctrl-imx6sll.c new file mode 100644 index 000000000000..0fbea9cf536d --- /dev/null +++ b/drivers/pinctrl/freescale/pinctrl-imx6sll.c @@ -0,0 +1,360 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2016 Freescale Semiconductor, Inc. + * Copyright 2017-2018 NXP. + * + */ + +#include <linux/err.h> +#include <linux/init.h> +#include <linux/io.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/pinctrl/pinctrl.h> + +#include "pinctrl-imx.h" + +enum imx6sll_pads { + MX6SLL_PAD_RESERVE0 = 0, + MX6SLL_PAD_RESERVE1 = 1, + MX6SLL_PAD_RESERVE2 = 2, + MX6SLL_PAD_RESERVE3 = 3, + MX6SLL_PAD_RESERVE4 = 4, + MX6SLL_PAD_WDOG_B = 5, + MX6SLL_PAD_REF_CLK_24M = 6, + MX6SLL_PAD_REF_CLK_32K = 7, + MX6SLL_PAD_PWM1 = 8, + MX6SLL_PAD_KEY_COL0 = 9, + MX6SLL_PAD_KEY_ROW0 = 10, + MX6SLL_PAD_KEY_COL1 = 11, + MX6SLL_PAD_KEY_ROW1 = 12, + MX6SLL_PAD_KEY_COL2 = 13, + MX6SLL_PAD_KEY_ROW2 = 14, + MX6SLL_PAD_KEY_COL3 = 15, + MX6SLL_PAD_KEY_ROW3 = 16, + MX6SLL_PAD_KEY_COL4 = 17, + MX6SLL_PAD_KEY_ROW4 = 18, + MX6SLL_PAD_KEY_COL5 = 19, + MX6SLL_PAD_KEY_ROW5 = 20, + MX6SLL_PAD_KEY_COL6 = 21, + MX6SLL_PAD_KEY_ROW6 = 22, + MX6SLL_PAD_KEY_COL7 = 23, + MX6SLL_PAD_KEY_ROW7 = 24, + MX6SLL_PAD_EPDC_DATA00 = 25, + MX6SLL_PAD_EPDC_DATA01 = 26, + MX6SLL_PAD_EPDC_DATA02 = 27, + MX6SLL_PAD_EPDC_DATA03 = 28, + MX6SLL_PAD_EPDC_DATA04 = 29, + MX6SLL_PAD_EPDC_DATA05 = 30, + MX6SLL_PAD_EPDC_DATA06 = 31, + MX6SLL_PAD_EPDC_DATA07 = 32, + MX6SLL_PAD_EPDC_DATA08 = 33, + MX6SLL_PAD_EPDC_DATA09 = 34, + MX6SLL_PAD_EPDC_DATA10 = 35, + MX6SLL_PAD_EPDC_DATA11 = 36, + MX6SLL_PAD_EPDC_DATA12 = 37, + MX6SLL_PAD_EPDC_DATA13 = 38, + MX6SLL_PAD_EPDC_DATA14 = 39, + MX6SLL_PAD_EPDC_DATA15 = 40, + MX6SLL_PAD_EPDC_SDCLK = 41, + MX6SLL_PAD_EPDC_SDLE = 42, + MX6SLL_PAD_EPDC_SDOE = 43, + MX6SLL_PAD_EPDC_SDSHR = 44, + MX6SLL_PAD_EPDC_SDCE0 = 45, + MX6SLL_PAD_EPDC_SDCE1 = 46, + MX6SLL_PAD_EPDC_SDCE2 = 47, + MX6SLL_PAD_EPDC_SDCE3 = 48, + MX6SLL_PAD_EPDC_GDCLK = 49, + MX6SLL_PAD_EPDC_GDOE = 50, + MX6SLL_PAD_EPDC_GDRL = 51, + MX6SLL_PAD_EPDC_GDSP = 52, + MX6SLL_PAD_EPDC_VCOM0 = 53, + MX6SLL_PAD_EPDC_VCOM1 = 54, + MX6SLL_PAD_EPDC_BDR0 = 55, + MX6SLL_PAD_EPDC_BDR1 = 56, + MX6SLL_PAD_EPDC_PWR_CTRL0 = 57, + MX6SLL_PAD_EPDC_PWR_CTRL1 = 58, + MX6SLL_PAD_EPDC_PWR_CTRL2 = 59, + MX6SLL_PAD_EPDC_PWR_CTRL3 = 60, + MX6SLL_PAD_EPDC_PWR_COM = 61, + MX6SLL_PAD_EPDC_PWR_INT = 62, + MX6SLL_PAD_EPDC_PWR_STAT = 63, + MX6SLL_PAD_EPDC_PWR_WAKE = 64, + MX6SLL_PAD_LCD_CLK = 65, + MX6SLL_PAD_LCD_ENABLE = 66, + MX6SLL_PAD_LCD_HSYNC = 67, + MX6SLL_PAD_LCD_VSYNC = 68, + MX6SLL_PAD_LCD_RESET = 69, + MX6SLL_PAD_LCD_DATA00 = 70, + MX6SLL_PAD_LCD_DATA01 = 71, + MX6SLL_PAD_LCD_DATA02 = 72, + MX6SLL_PAD_LCD_DATA03 = 73, + MX6SLL_PAD_LCD_DATA04 = 74, + MX6SLL_PAD_LCD_DATA05 = 75, + MX6SLL_PAD_LCD_DATA06 = 76, + MX6SLL_PAD_LCD_DATA07 = 77, + MX6SLL_PAD_LCD_DATA08 = 78, + MX6SLL_PAD_LCD_DATA09 = 79, + MX6SLL_PAD_LCD_DATA10 = 80, + MX6SLL_PAD_LCD_DATA11 = 81, + MX6SLL_PAD_LCD_DATA12 = 82, + MX6SLL_PAD_LCD_DATA13 = 83, + MX6SLL_PAD_LCD_DATA14 = 84, + MX6SLL_PAD_LCD_DATA15 = 85, + MX6SLL_PAD_LCD_DATA16 = 86, + MX6SLL_PAD_LCD_DATA17 = 87, + MX6SLL_PAD_LCD_DATA18 = 88, + MX6SLL_PAD_LCD_DATA19 = 89, + MX6SLL_PAD_LCD_DATA20 = 90, + MX6SLL_PAD_LCD_DATA21 = 91, + MX6SLL_PAD_LCD_DATA22 = 92, + MX6SLL_PAD_LCD_DATA23 = 93, + MX6SLL_PAD_AUD_RXFS = 94, + MX6SLL_PAD_AUD_RXC = 95, + MX6SLL_PAD_AUD_RXD = 96, + MX6SLL_PAD_AUD_TXC = 97, + MX6SLL_PAD_AUD_TXFS = 98, + MX6SLL_PAD_AUD_TXD = 99, + MX6SLL_PAD_AUD_MCLK = 100, + MX6SLL_PAD_UART1_RXD = 101, + MX6SLL_PAD_UART1_TXD = 102, + MX6SLL_PAD_I2C1_SCL = 103, + MX6SLL_PAD_I2C1_SDA = 104, + MX6SLL_PAD_I2C2_SCL = 105, + MX6SLL_PAD_I2C2_SDA = 106, + MX6SLL_PAD_ECSPI1_SCLK = 107, + MX6SLL_PAD_ECSPI1_MOSI = 108, + MX6SLL_PAD_ECSPI1_MISO = 109, + MX6SLL_PAD_ECSPI1_SS0 = 110, + MX6SLL_PAD_ECSPI2_SCLK = 111, + MX6SLL_PAD_ECSPI2_MOSI = 112, + MX6SLL_PAD_ECSPI2_MISO = 113, + MX6SLL_PAD_ECSPI2_SS0 = 114, + MX6SLL_PAD_SD1_CLK = 115, + MX6SLL_PAD_SD1_CMD = 116, + MX6SLL_PAD_SD1_DATA0 = 117, + MX6SLL_PAD_SD1_DATA1 = 118, + MX6SLL_PAD_SD1_DATA2 = 119, + MX6SLL_PAD_SD1_DATA3 = 120, + MX6SLL_PAD_SD1_DATA4 = 121, + MX6SLL_PAD_SD1_DATA5 = 122, + MX6SLL_PAD_SD1_DATA6 = 123, + MX6SLL_PAD_SD1_DATA7 = 124, + MX6SLL_PAD_SD2_RESET = 125, + MX6SLL_PAD_SD2_CLK = 126, + MX6SLL_PAD_SD2_CMD = 127, + MX6SLL_PAD_SD2_DATA0 = 128, + MX6SLL_PAD_SD2_DATA1 = 129, + MX6SLL_PAD_SD2_DATA2 = 130, + MX6SLL_PAD_SD2_DATA3 = 131, + MX6SLL_PAD_SD2_DATA4 = 132, + MX6SLL_PAD_SD2_DATA5 = 133, + MX6SLL_PAD_SD2_DATA6 = 134, + MX6SLL_PAD_SD2_DATA7 = 135, + MX6SLL_PAD_SD3_CLK = 136, + MX6SLL_PAD_SD3_CMD = 137, + MX6SLL_PAD_SD3_DATA0 = 138, + MX6SLL_PAD_SD3_DATA1 = 139, + MX6SLL_PAD_SD3_DATA2 = 140, + MX6SLL_PAD_SD3_DATA3 = 141, + MX6SLL_PAD_GPIO4_IO20 = 142, + MX6SLL_PAD_GPIO4_IO21 = 143, + MX6SLL_PAD_GPIO4_IO19 = 144, |
