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path: root/drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c
AgeCommit message (Expand)AuthorFilesLines
2024-06-25drm/msm/dsi: Add phy configuration for MSM8937Daniil Titov1-0/+18
2024-06-23drm/msm/dsi: Remove dsi_phy_write_[un]delay()Konrad Dybcio1-29/+52
2024-06-23drm/msm/dsi: Remove dsi_phy_read/write()Konrad Dybcio1-114/+110
2023-06-04drm/msm/dsi: Add phy configuration for MSM8226Luca Weiss1-0/+97
2022-09-18drm/msm/dsi: Take advantage of devm_regulator_bulk_get_const()Douglas Anderson1-18/+10
2022-09-18drm/msm/dsi: Don't set a load before disabling a regulatorDouglas Anderson1-3/+3
2022-09-18drm/msm/dsi_phy_28nm: Replace parent names with clk_hw pointersMarijn Suijten1-27/+23
2022-09-18drm/msm/dsi/phy: Replace hardcoded char-array length with sizeof()Marijn Suijten1-12/+12
2022-09-18drm/msm/dsi/phy: Reindent and reflow multiline function callsMarijn Suijten1-37/+36
2022-02-18drm/msm/dsi: Use "ref" fw clock instead of global name for VCO parentMarijn Suijten1-1/+3
2021-06-23drm/msm: Generated register updateRob Clark1-0/+1
2021-04-07drm/msm/dsi: stop passing src_pll_id to the phy_enable callDmitry Baryshkov1-2/+2
2021-04-07drm/msm/dsi: inline msm_dsi_phy_set_src_pllDmitry Baryshkov1-6/+7
2021-04-07drm/msm/dsi: remove duplicate fields from dsi_pll_Nnm instancesDmitry Baryshkov1-27/+21
2021-04-07drm/msm/dsi: move ioremaps to dsi_phy_driver_probeDmitry Baryshkov1-21/+12
2021-04-07drm/msm/dsi: drop PLL accessor functionsDmitry Baryshkov1-59/+59
2021-04-07drm/msm/dsi: drop msm_dsi_pll abstractionDmitry Baryshkov1-38/+45
2021-04-07drm/msm/dsi: make save_state/restore_state callbacks accept msm_dsi_phyDmitry Baryshkov1-20/+14
2021-04-07drm/msi/dsi: inline msm_dsi_pll_helper_clk_prepare/unprepareDmitry Baryshkov1-29/+57
2021-04-07drm/msm/dsi: simplify vco_delay handling in dsi_phy_28nm driverDmitry Baryshkov1-8/+4
2021-04-07drm/msm/dsi: use devm_clk_*register to registe DSI PHY clocksDmitry Baryshkov1-28/+22
2021-04-07drm/msm/dsi: push provided clocks handling into a generic codeDmitry Baryshkov1-55/+8
2021-04-07drm/msm/dsi: move min/max PLL rate to phy configDmitry Baryshkov1-2/+6
2021-04-07drm/msm/dsi: drop global msm_dsi_phy_type enumarationDmitry Baryshkov1-11/+8
2021-04-07drm/msm/dsi: move all PLL callbacks into PHY config structDmitry Baryshkov1-22/+43
2021-04-07drm/msm/dsi: drop multiple pll enable_seq supportDmitry Baryshkov1-7/+16
2021-04-07drm/msm/dsi: fuse dsi_pll_* code into dsi_phy_* codeDmitry Baryshkov1-0/+637
2021-04-07drm/msm/dsi: replace PHY's init callback with configurable dataDmitry Baryshkov1-3/+3
2019-11-04drm/msm/dsi: Add configuration for 28nm PLL on family BAngeloGioacchino Del Regno1-0/+18
2019-10-24drm/msm/dsi: Implement qcom, dsi-phy-regulator-ldo-mode for 28nm PHYStephan Gerhold1-8/+34
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284Thomas Gleixner1-9/+1
2018-12-11drm: msm: Use DRM_DEV_* instead of dev_*Mamta Shukla1-1/+1
2017-02-06drm/msm/dsi: Move PHY operations out of hostHai Li1-2/+2
2017-02-06drm/msm/dsi: Add a PHY op that initializes version specific stuffArchit Taneja1-0/+2
2016-07-16drm/msm/dsi: Don't get DSI index from DTArchit Taneja1-0/+4
2016-05-08drm/msm/dsi: Fix regulator API abuseArchit Taneja1-2/+2
2015-10-22drm/msm/dsi: Updata LNn_CFG4 register settings for 28nm PHYHai Li1-4/+2
2015-08-15drm/msm/dsi: Split PHY drivers to separate filesHai Li1-0/+166
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